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BEL projects building HOW TO THIS HOWTO IS DEPRECATED Prerequistes The following packages are required to build BEL projects: $ sudo apt get install build esse...

r6 - 2019-06-19 - 15:30 by dbeck

DBBasedAnalysisOfTimingMessages

Main.MathiasKreider 01 Dec 2021 Using snoop outputs for analysis of what's going on in the accelerator Purpose * One Thing * Lorem ipsum ... ...

NEW - 2021-12-02 - 10:33 by mkreider

EXPLODER5A

Figure 1: A complete exploder5a module (top view). Main.AlexanderHahn 15 Jul 2015

r2 - 2016-02-23 - 16:03 by dbeck

ExcessivePtpAndLldpTraffic

WR PTP synchronization of WRS under excessive PTP and LLDP traffic 1. Introduction The White Rabbit (WR) technique is specially developed to provide sub nanose...

NEW - 2022-05-27 - 15:34 by eochirs

FirmwareID

Main.MathiasKreider 07 May 2015 Getting Information about the Firmware on a device Firmware IDs The eb info tool was used to read out the build id ROM, providin...

r3 - 2015-05-11 - 11:06 by mkreider

FlashingWithEthernetBlaster

How To: Configuring and using Altera Ethernet Blaster to flash DM PRO * Download current gateware archive, unpack * Copy jic file to tmp directory on tsl021...

r2 - 2021-01-22 - 10:50 by mkreider

GHDLVHPI

GHDL coupling to C via VHPI Motivation It is often useful to call into c libraries from within a VHDL simulation/testbench * because VHDL standard library is ...

r2 - 2022-10-20 - 11:04 by mreese

GSITimingTeam

FAIR Timing/GSI Timing Team Core members of the GSI Timing Team are: T.Fleck C.Prados S.Rauch M.Kreider Further leading actors within the GSI controls group are U...

r3 - 2009-03-05 - 08:55 by TiborFleck

HdlmakeUbuntuInstall

hdlmake auf ein Ubuntu System installieren (Deprecated) THIS HOWTO IS DEPRECATED hdlmake ist ein Präprozessor um VHDL include files und VHDL source files in die...

r4 - 2019-06-19 - 15:41 by dbeck

Members

GSI Timing Team Core members of the GSI Timing Team are: F. Ameil: team leader D. Beck: operation, tools and docs, legacy stuff for UNILAC, bunch 2 bucket transfe...

r40 - 2024-12-11 - 09:39 by DietrichBeck

MonitorLocalSystemTimeOfWRSviaSNMP

Monitor local system time of a WRS via SNMP 1. Introduction WRS synchronises its local time with an external NTP server, if one is specified in CONFIG_NTP_SERVER...

NEW - 2021-09-24 - 13:09 by eochirs

NetworkTopologyInterfaces

* chap2.pdf: Chapter2 Topology Main.CesarPrados 03 Mar 2009

r2 - 2009-03-04 - 14:52 by TiborFleck

PortMirroringWRS

Use port mirroring on a WR switch (WRS) 1. Introduction Although port mirroring is supported by WRSs a corresponding command option is not documented in the user...

r3 - 2022-03-24 - 13:28 by eochirs

ProgramPexaria5

Programmieren einer Pexaria 5 THIS HOWTO IS DEPRECATED Voraussetzungen : * USB Blaster * Promo 5 * 12 V Netzteil * Pexaria 5 * Quartus II Subscri...

r5 - 2019-06-19 - 15:35 by dbeck

Quartus16InstallMint191

Installing Quartus 18.1 on Linux Mint 19.2 Introduction Below steps are described to solve some trouble during and after installation of Quartus Prime Standard ...

r6 - 2019-11-01 - 11:06 by mskorsky

QuartusInstallUbuntu1404

Installing Quartus under Ubuntu 14.04 (and possibly others) THIS HOWTO IS DEPRECATED Introduction This page contains a few notes on installing Altera's Quartu...

r3 - 2019-06-19 - 16:04 by dbeck

QuartusUbuntuInstallieren

Installieren Quartus II auf ein Ubuntu System: THIS HOWTO IS DEPRECATED * Download Quartus von https://www.altera.com/download/sw/dnl sw index.jsp * Quart...

r5 - 2019-06-19 - 15:38 by dbeck

RunOrdinaryBoundaryClocksUsingLinuxptp

Run the ordinary and boundary clocks using linuxptp The linuxptp package is a PTPv2 implementation according to the IEEE 1588 standard for Linux. It includes the ...

r5 - 2022-12-16 - 17:19 by eochirs

Saftlib2MigrationGuide

Main.MichaelReese 07 Feb 2019 In response to user requests for lower latency communication and fewer library dependencies in saftlib, API breaking changes are int...

r30 - 2019-11-12 - 09:42 by mreese

SaftlibEtherboneLm32LatencyMeasurement

MSI/IRQ Latency Measurements with LM32, Etherbone and Saftlib In autumn 2017, the latency of Message Signalled Interrupts (MSI) has been measured involving differ...

r5 - 2017-11-30 - 15:24 by mreese

SnoopAnalysisBoosterTest1

Booster Test November 2021 Introduction The so called 'Booster Mode' shall be used to accumulate beam from multiple SIS18 injections into SIS100 at a rate of abo...

r10 - 2021-12-22 - 10:26 by dbeck

SynchronizeNonWrDevices

Synchronize the clock of non WR devices in the WR network 1. Introduction This document presents specific configurations of White Rabbit (WR) switches, which are...

NEW - 2022-06-02 - 15:22 by eochirs

TestIeee1588NetworkAdapters

Test the interoperability of the IEEE 1588 capable network adapters with the White Rabbit switches Introduction This report presents the interoperability between...

r2 - 2022-10-28 - 10:54 by eochirs

TimingSystem50HzSync

WR F50: Synchronizing the White Rabbit Data Master to 50 Hz Mains Introduction Stability of Linac RF systems are vital for a stable operation of UNILAC. As many ...

r7 - 2024-12-11 - 11:41 by DietrichBeck

TimingSystemAMCTestingAndCommissioning

AMC Testing and Commissioning Guide Required components for each uTCA device * SFP (green/purple) * LC cable and a white rabbit switch (Recommended: RUN...

r27 - 2019-12-12 - 13:34 by ahahn

TimingSystemAcronyms

Acronyms These acronyms are focused on the timing system, but may contain other acronyms of the accelerator complex as well. Unclear Acronyms acronyms to be clar...

r12 - 2024-12-16 - 11:09 by DietrichBeck

TimingSystemBallonRelease

Balloon Release (OUTDATED) The Balloon Release is NOT COMPATIBLE with the snapshot "January 2016" or previous releases or snapshots. If you want to test or integr...

r26 - 2019-08-20 - 09:27 by dbeck

TimingSystemBuTiSReceiver

BuTiS Receiver Station The BuTiS receiver station are maintained by the RF group, contact persons are P. Moritz or B. Zipfel. Setup Figure 1: BuTiS receiver sta...

r9 - 2014-07-15 - 13:12 by dbeck

TimingSystemButisInterface

White Rabbit, BuTiS, Clocks and Time Introduction Two systems exist for distribution of time stamps and clocks: 1. The General Machine Timing System provides ...

r29 - 2020-11-19 - 13:41 by dbeck

TimingSystemCherryRelease

Cherry Release V4 (OUTDATED) The Cherry Release is partly compatible with the the Balloon release. * ECA et al should be compatible * But ... * there ...

r9 - 2019-08-20 - 09:28 by dbeck

TimingSystemClockMaster

Clock Master Production This page documents the configuration of the Clock Master. Please note the corresponding How To. Introduction The Clock Master is the sou...

r29 - 2019-10-29 - 12:26 by dbeck

TimingSystemClockMasterOther

Clock Master Other This page documents the configuration of the Clock Master for the other White Rabbit networks (not 'Production'). Introduction The Clock Mast...

r3 - 2019-10-29 - 16:15 by dbeck

TimingSystemContext

The Timing System and its Context in the Accelerator Control System What is described here has been compiled from the Common Specifications for the Accelerator Co...

r20 - 2024-12-16 - 11:06 by DietrichBeck

TimingSystemDBusInfo

Main.MichaelReese 30 Sep 2016 Saftlib is constructed around the DBus IPC system. In order to maintain and develop the library, a fairly good understanding of the ...

r16 - 2017-09-15 - 11:10 by mreese

TimingSystemDMUniPZ

Gateway Data Master UNILAC PZ (dm unipz) Introduction dm unipz 'dm unipz' is the interface between the White Rabbit based Data Master und the MIL based UNILAC ...

r12 - 2024-12-11 - 11:39 by DietrichBeck

TimingSystemDataMaster

Data Master Manuals DM Technote: DM Manual. A DM Firmware and API Documentation. WIP, about 80% complete. Still trying to keep up with all the implemented feature...

r53 - 2024-10-02 - 21:28 by mskorsky

TimingSystemDataMasterTestSystem

Documentation Data Master Test System Hardware SuperMicro fel0069 The data master for the test system is hosted on SuperMicro fel0069 with two PEXARIA5d (fel006...

r20 - 2024-10-01 - 09:35 by mskorsky

TimingSystemDataMasterTestsHowTo

How to run and develop tests for the Datamaster General Framework The tests for the datamaster are designed for use during development of datamaster features and...

r9 - 2024-09-26 - 14:51 by mskorsky

TimingSystemDataMasterUnilac

Description of the features for the UNILAC Datamaster This describes the planned features for the UNILAC datamaster. The features were presented at the Workshop U...

r4 - 2024-02-07 - 14:17 by mskorsky

TimingSystemDataMasterXMLFormat

The XML Format Used by the Data Master The DM uses an XML format to describe a schedule. Presently (09/2014), this format depends on implementation details. A (no...

NEW - 2014-09-29 - 13:54 by dbeck

TimingSystemDeprecatedDocumentation

Deprecated Documents This is just a unrevised collection of outdated or deprecated documents. * Feature List for a Timing Receiver Node at GSI/FAIR (09/2014)...

NEW - 2018-11-20 - 08:27 by dbeck

TimingSystemDeprecatedHowTo

Deprecated HOW TOs This is just a unrevised collection of outdated or deprecated HOW TOs. Timing Receivers * Building and Installation * HOW TO: Instal...

r6 - 2022-01-14 - 15:16 by dbeck

TimingSystemDiagnostics

Reading the DM status To get an overview on whats running on a DM, you can get the basic status by issuing root@tsl017 ~ # dm cmd dev/wbm0 or root@tsl017 ~ # dm...

NEW - 2021-02-17 - 16:29 by mkreider

TimingSystemDocumentRep20180131

Etherbone Performance Measurements Introduction Access to Wishbone (WB) slaves in the FPGA from the host system is a prominent use case for the accelerator contr...

r9 - 2019-01-15 - 13:46 by dbeck

TimingSystemDocumentRep20180904

SCU Kernel Task Switching Latency Introduction The hardware group (thx to Stefan!) has investigated task switchting / preemption on the SCU kernel with RT patch ...

r6 - 2018-09-27 - 16:40 by dbeck

TimingSystemDocumentRep20190221

Pseudo SRAM Access from lm32 Introduction The W968D6DA provides 256Mbit (32MByte) of Pseudo SRAM (datasheet). It provides 32 bit address width and 16 data lines....

r3 - 2019-02-21 - 11:46 by dbeck

TimingSystemDocumentRep20190911

WR ZEN aka SSK Introduction The timing team (TOS) operates a couple of distinct White Rabbit networks. The most important one is a network called production, tha...

r8 - 2019-09-20 - 14:42 by dbeck

TimingSystemDocumentRep20191010

Report: Latency and Loss of Timing Messages in the Timing System Introduction Starting in October 2019 the ECA Tap module was added to the gateware of a few dedi...

r8 - 2019-12-27 - 12:46 by dbeck

TimingSystemDocumentRep20210218

Saftlib Latency Measurements During the startup of the accelerator in February 2021, issues have been observed with the so called function generator (FG): Occasio...

NEW - 2021-02-18 - 10:25 by dbeck

TimingSystemDocumentation

Documentation Some documentation is given here. This is not structured but just a collection of various things. * Documents * HOW TOs * Releases * Cur...

r5 - 2018-11-18 - 08:09 by dbeck

Number of topics: 50

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