Detailed topic list for TOS/Timing Web

Results from TOS/Timing web retrieved at 23:26 (Local)

TimingSystemDocuments
Documents Table of Contents Technical Documents General Machine Timing System * Timing System @ GSI * Master (10/2019) * Network (04/2015) ...
r159 - 2024-12-03 - 18:14 by dbeck
TimingSystemDocumentsAddOnBoardFeatures
Feature List for Add On boards of Timing Receivers at GSI and FAIR This page lists some hardware features for add on boards. Such add on boards are mezzanine boar...
r11 - 2013-11-01 - 09:15 by dbeck
TimingSystemDocumentsBlackCat1
Black_Cat1 Mezzanine Board The Black Cat mezzanine board extends the PEXARIA5 board with I/Os. However, the WR1 connector on Black Cat is no longer used, as the W...
r4 - 2014-07-15 - 16:50 by dbeck
TimingSystemDocumentsConnectionEELabor
Connection to EE Labor This is just a temporary document, to be replaced by some proper documentation. Note on calculating cable lengths The cable length has bee...
r6 - 2024-04-22 - 07:40 by dbeck
TimingSystemDocumentsFTRNFeatures
Feature List for Timing Receivers at GSI and FAIR This page lists some hardware features for timing receivers at GSI and FAIR. Some recommended features will beco...
r13 - 2014-09-25 - 22:07 by dbeck
TimingSystemDocumentsGateFirmWare
Gateware and Firmware Gateware and firmware are provided with releases. * Gateware: synthesized (V)HDL code * Firmware: compiled code for the lm32 soft CPU ...
r8 - 2020-09-30 - 11:59 by dbeck
TimingSystemDocumentsMaster
The FAIR Timing Master in the "Betriebsgebäude" BG This is a collection of documents related to the FAIR Timing Master in the "Elektronikraum". Equipment Rack5...
r10 - 2019-10-29 - 13:44 by dbeck
TimingSystemDocumentsNetwork
Timing Network Networks There are several instances of timing networks on the campus. * Productive * production: everything starting with the end of TK ...
r3 - 2024-04-22 - 07:42 by dbeck
TimingSystemDocumentsPEXARIA5DB1
PEXARIA5DB The PEXIARA5DB is a mezzanine card for a PEXARIA5 carrier board. It exists in two variants. * PEXARIA5DB1, with IDC connector for LVDS signals: sche...
r4 - 2014-05-05 - 09:33 by dbeck
TimingSystemDocumentsRep201607222
Torture Report about GMT with Debian on PC and SL6/CentOS 7 on SCU3 Setup A schedule containing three messages is iterated by the Data Master. The messages are s...
r6 - 2018-01-30 - 10:55 by dbeck
TimingSystemDocumentsRep20211222
Booster Test December 2021 TL;DR For 'booster mode': * timing the beam transfer from UNILAC to SIS18 works with ~98% efficiency, if rf conditioning at UNILAC ...
r6 - 2022-01-13 - 10:04 by dbeck
TimingSystemDocumentsReportsAndMeasurements
Reports and Measurements This page serves to collect reports and measurements on the GMT. Booster Test * Timing events during 1st Booster Mode Test (2021 12 1...
r37 - 2024-04-22 - 07:44 by dbeck
TimingSystemDocumentsSIXIO2
FMC Module SIXIO2 The FMC module SIXIO2 has been designed by Jan Hoffmann / EE. It's purpose is simple I/O. * Info by EE: Some figures and specs * Sixio2_SC...
r5 - 2014-07-15 - 14:57 by dbeck
TimingSystemDocumentsSaftlib
Simple API For Timing (SaftLib) Simple API For Timing (SAFT). The design and implementation of SaftLib is a major project. Introduction The key features SaftLib ...
TimingSystemDoomsdayRelease
Doomsday Release (DEPRECATED) Previous releases are Asterisk, Balloon and Cherry. This release is replaced by Enigma. New features and bug fixes in Doomsday Rel...
r20 - 2019-11-14 - 16:23 by dbeck
TimingSystemEBWireshark
How To: Etherbone with Wireshark Introduction Wireshark might be useful when you need to inspect Etherbone packages sent via Ethernet, see here. Here are a few h...
r3 - 2019-10-11 - 15:41 by dbeck
TimingSystemERelease
Enigma Release (DEPRECATED) Previous releases are Asterisk, Balloon, Cherry and Doomsday. This release has been replaced by release Fallout. New Features and Bu...
r36 - 2020-10-01 - 16:45 by dbeck
TimingSystemErrorMsg
Documentation of Data Master Error Messages Parser Errors caused by faulty schedule data If any of the following error messages are reported to you or appear in ...
NEW - 2021-02-17 - 14:55 by mkreider
TimingSystemEtherbone
Etherbone Introduction The idea behind the EtherBone (EB) protocol is to extend the reach of the embedded Wishbone (WB) V4 System on a chip (SoC) bus system to r...
r4 - 2022-10-08 - 23:02 by dbeck
TimingSystemEvent
Timing Messages Format of a Timing Message Timing messages is a term describing the input to a Timing Receiver (TR) that possibly leads to generation of a so cal...
r37 - 2024-11-05 - 11:15 by dbeck
TimingSystemEventMil
MIL Event Telegram Format Introduction The 'old' GSI control system used a field bus that is an extension of the MIL STD 1553 field bus 1 . At GSI, this 'MIL bu...
TimingSystemEventNumbers
Event Numbers Overview Event numbers serve as IDs for actions performed by the control system. Existing Facility Information about event numbers used by the ex...
r36 - 2024-10-23 - 10:02 by dbeck
TimingSystemFEC
How To: WB_FEC This wiki provides information about * WB FEC VHDL module and integration in Bel_Projects * Synthesis of Timing Receiver Gateware with the WB...
r14 - 2018-04-05 - 09:16 by dbeck
TimingSystemFRelease
Fallout Release Previous releases are Asterisk, Balloon, Cherry, Doomsday and Enigma New features and bug fixes in Fallout Release * 2020 Aug 31: v6.0.0 alph...
TimingSystemFrontendAccess
How To: Accessing ACO Frontends Using ACO Tools Introduction This how to is just intended as a primer for non specialists. Disclaimer: There are many, many possi...
r5 - 2022-03-23 - 11:39 by dbeck
TimingSystemGPSDO
GPSDO The GPSDO serves as a primary reference time source for the timing system. Amongst the interfaces, there are three Gigabit Ethernet ports for NTP servers. ...
TimingSystemGSEca
Timing Receiver: Event Condition Action Unit Figure: A Timing Receiver embedded in a Front End Computer. The core component is the Event Condition Action unit (...
r6 - 2018-11-16 - 12:01 by dbeck
TimingSystemGSOverview
Essentials Figure: Building blocks required for a single 'timing event' Bang!. Components of the General Machine Timing (GMT) are shown in blue. Components requ...
r4 - 2018-11-13 - 10:04 by dbeck
TimingSystemGSTrUsage
Timing Receiver: Usage For using a Timing Receiver (TR) please follow the directions here. What is Needed * TR hardware, see here what is supported by the cur...
TimingSystemGettingStarted
Getting Started * Essentials * Timing Receiver: Event Condition Action Unit * Timing Receiver: Usage Main.DietrichBeck 16 Nov 2018
r5 - 2018-11-16 - 10:47 by dbeck
TimingSystemGmtUnipz
Data Master, UNILAC PZ and Various Gateways An Overview Introduction Today (December 2021) there exist two Machine Timing Systems at GSI. First, the General Ma...
r4 - 2024-11-14 - 16:35 by dbeck
TimingSystemGroupsAndMachines
Groups and Machines Figure: Overview on GSI accelerators. Click here for a larger image. Overview Accelerator equipment relevant for the control system is organi...
r55 - 2024-10-23 - 10:03 by dbeck
TimingSystemHowBasicsDMUniPZ
Einleitung Das Gateway hat die Aufgabe, das zeitbasierte White Rabbit Timingsystem mit der eventbasierten UNILAC Pulszentrale (UNIPZ) zu verbinden. Bei UNIPZ wurd...
r2 - 2024-04-24 - 09:37 by dbeck
TimingSystemHowBetriebDMUniPZ
How To: Gateway Data Master UNILAC Pulszentrale Betrieb Kurzversion * das Gateway ist primitiv * am Gateway kann man nichts einstellen * das Gateway w...
NEW - 2021-11-18 - 19:04 by dbeck
TimingSystemHowBuildingDeployment
How To: Building and Deployment for Linux Boxes and SCU Most of the code has been developed in the context of the White Rabbit Project and is hosted by the Open H...
r78 - 2024-08-28 - 13:18 by dbeck
TimingSystemHowCodeDeployWRUniPZ
How To: White Rabbit UNILAC PZ (wr unipz) Coding and Deployment Introduction Stack of the White Rabbit Pulszentrale Figure: Overview on the White Rabbit Pul...
r8 - 2024-11-14 - 15:05 by dbeck
TimingSystemHowConfigureDMUniPZ
How To: Gateway Data Master UNILAC Pulszentrale Konfiguration und Rufbereitschaft Hinweis Ein How To zur Diagnose der UNILAC Pulszentrale gibt es hier. Hintergr...
TimingSystemHowConfigureDataMaster
Data Master: How To Configure and Operate There are different versions of the data master depending on the release of the control system. * Release R12 "Cherr...
r9 - 2018-03-12 - 10:57 by mkreider
TimingSystemHowConfigureDataMasterR1
Data Master: How To Configure and Operate for Release R1 This describes the temporary solution derived from miniCS (July 2013). This information is outdated, as...
r3 - 2014-07-10 - 10:42 by dbeck
TimingSystemHowConfigureDataMasterR10
Data Master: How To Configure and Operate for Release R10 ("Pre Cherry") DEPRECATED Introduction This How To is intended for the members of the timing team. The...
r3 - 2017-12-04 - 08:51 by dbeck
TimingSystemHowConfigureDataMasterR11
Data Master: How To Configure and Operate for Release R11 ("Cherry") Introduction This How To is intended for the members of the timing team. The data master is ...
r2 - 2017-12-08 - 09:15 by dbeck
TimingSystemHowConfigureDataMasterR3
Data Master: How To Configure and Operate for Release R3 R9 ("Balloon") DEPRECATED Introduction This How To is intended for the members of the timing team. The d...
r14 - 2017-12-04 - 08:52 by dbeck
TimingSystemHowConfigureEnvironment
Ohps! You are looking for an old wiki page that has been renamed. Try this wiki page Main.DietrichBeck 19 Jun 2019
NEW - 2019-06-19 - 15:58 by dbeck
TimingSystemHowConfigureFTRNCommandLine
How To: Command Line Tools for Timing Receiver (including SCU) Introduction A set of command line tools is deployed and available on Front End Computers (FECs). ...
r25 - 2022-02-25 - 12:45 by dbeck
TimingSystemHowConfigureFTRNVME
FAIR Timing Receiver Node: How To Configure and Operate a VME Timing Receiver (outdated) THIS HOWTO IS DEPRECATED August 2013 Introduction The VETAR2 is the ne...
r7 - 2019-06-19 - 15:35 by dbeck
TimingSystemHowConfigureWRUniPZ
How To: White Rabbit UNILAC PZ (wr unipz) Betrieb Betrieb und Rufbereitschaft Kurzversion * keine Einstellungen fuer Betrieb notwendig * nach SCU Reset ...
r16 - 2021-11-18 - 18:11 by dbeck
TimingSystemHowDMUniPZ
Gateway Data Master UNILAC Pulszentrale (DM UNIPZ) DM UNIPZ * Betrieb * Configuration and Rufbereitschaft * (for editing the basics, click) Further...
TimingSystemHowDebugSaftlibWithGDB
Remote debugging of a running saft daemon with GDB It is possible to connect GDB to a running SCU, set breakpoints, step through the code, print variables, etc. T...
r2 - 2021-10-13 - 14:19 by mreese
TimingSystemHowDevAcc
How To: Poor Man's (d, m, w) Path to Device Access Introduction This How To is not even a how to. Instead, it is just a collection of stuff required to develop a...
r14 - 2020-08-31 - 11:57 by dbeck
TimingSystemHowEbFwload
How To: eb fwload Introduction This tool has been written to ease software development form lm32 Soft Cores. It allows to upload firmware to one or more Soft Cor...
r4 - 2019-06-19 - 15:55 by dbeck
Number of topics: 50
< Previous Page 2 of 5 Next >

See also the faster WebTopicList
Topic revision: r1 - 2009-01-09, ProjectContributor - This page was cached on 2025-01-30 - 23:26.

This site is powered by FoswikiCopyright © by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding GSI Wiki? Send feedback | Legal notice | Privacy Policy (german)