This describes the temporary solution derived from miniCS (July 2013).
This information is outdated, as all SCUs have been flashed with newer Gateware
Introduction
The data master is implemented on a SCU with special gateware/firmware. The data master is configured and controlled via a simple C test program. The configuration is hard coded (you need to recompile). It just configures a cycle of six events and starts the data master.
- 0x5555555500000000: cycle start + 10us
- 0x6666666600000000: cycle start + 20us
- 0x3333333300000000: cycle start + 120ms (pre-trigger)
- 0x1111111100000000: cycle start + 130ms (pulse start)
- 0x2222222200000000: cycle start + 230ms (pulse stop)
- 0x4444444400000000: cycle start + 240ms (post-trigger)
Starting the Data Master
After power-cycling, the data master needs to be started manually.
- Logon to the scul022
-
cd /opt/fesa/local/
-
./mcstma_test dev/wbm0 &
- The display should give some information.
Sources and Makefile are
here.
--
DietrichBeck - 03 Jul 2013