Acronyms
These acronyms are focused on the timing system, but may contain other acronyms of the accelerator complex as well.
Unclear Acronyms
acronyms to be clarified are marked
bold.
- GMT, General Machine Timing system (GMT is also known as Greenwich Mean Time)
- FEC, Forward Error Correction or Front-End Controller
- CS, the accelerator Control System (do we have a name for this?)
A
- ACCNET: ACCelerator NETwork, technical accelerator network
- ACU: Adaptive Control Unit, modular FPGA based control unit, special type of [TimingSystemAcronyms#F][FEC]]
- ATL: API Timing Library
B
- BEP, Bit Error Probability, term used within FEC
- BER, Bit Error Ratio, term used within FEC
- BMC, Best Master Clock, term used by PTP
- BuTiS, Bunchphase-Time Synchronization System, distributed highly precise clock
C
- C1/2, Corrected sine signal 1 and 2, term used by BuTiS
- CS, Control System
D
- DDS, Direct Digital Synthesizer, frequency synthesizer, used for re-synthesis of BuTiS T0 clock
E
- ECA, Event-Condition-Action Unit, a TR component which translates incoming events to actions
- EPU, Event Processing Unit, digests event sequences from LSA, and converts them into an event stream
F
- FEC, Front End Controller
- FECo, Forward Error Correction
- FEP, Frame Error Protection, term used by FEC
- FESA, Front-End Software Architecture, device model framework and driver package
G
H
I
J
K
L
- LSA, LHC Software Architecture, settings management framework. It uses the TM
- LS1/LP0, Local reference signals S1/P0, term used by BuTiS
M
- MCS, Master Cycle Sequencer, coordinates beams and cycles throughout the accelerators
N
O
P
Q
R
S
T
- T0, Time 0, corrected clock identifier (originally P0, term used by BuTiS
- TAI, International Atomic Time
- TM, Timing Master, used by LSA to creates sequence programs for EPU
- TR, Timing Receiver
U
V
W
X
Y
Z
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DietrichBeck - 01 Mar 2011