How To: eb rest Introduction This tool has been written to easy 'reset of FPGA'. This cycles the FPGA and (re)loads the image from the flash to the FPGA. Use too...
Test the interoperability of the IEEE 1588 capable network adapters with the White Rabbit switches Introduction This report presents the interoperability between...
GHDL coupling to C via VHPI Motivation It is often useful to call into c libraries from within a VHDL simulation/testbench * because VHDL standard library is ...
Etherbone Introduction The idea behind the EtherBone (EB) protocol is to extend the reach of the embedded Wishbone (WB) V4 System on a chip (SoC) bus system to r...
Install etherbone library on tsl101 server * login on acc8 dev cluster (e.g. asl751) and clone repo and checkout correct branch git clone https://github.com/GS...
Synchronize the clock of non WR devices in the WR network 1. Introduction This document presents specific configurations of White Rabbit (WR) switches, which are...
WR PTP synchronization of WRS under excessive PTP and LLDP traffic 1. Introduction The White Rabbit (WR) technique is specially developed to provide sub nanose...
How To: eb console Set a static IP Timing receivers not connected to a bootp server require a static IP for full operation. This is to be set via the eb console ...
Use port mirroring on a WR switch (WRS) 1. Introduction Although port mirroring is supported by WRSs a corresponding command option is not documented in the user...
How To: Accessing ACO Frontends Using ACO Tools Introduction This how to is just intended as a primer for non specialists. Disclaimer: There are many, many possi...
Authentication of network nodes and assginment of virtual LAN using the White Rabbit switches 1. Introduction The 802.1x authentication standard is supported by ...
How To: saft clk gen Introduction This tool is intended to generate clock trains for fixed frequencies. It uses a simple DDS embedded in the timing receivers gat...
How To: Command Line Tools for Timing Receiver (including SCU) Introduction A set of command line tools is deployed and available on Front End Computers (FECs). ...
Deprecated HOW TOs This is just a unrevised collection of outdated or deprecated HOW TOs. Timing Receivers * Building and Installation * HOW TO: Instal...
Booster Test December 2021 TL;DR For 'booster mode': * timing the beam transfer from UNILAC to SIS18 works with ~98% efficiency, if rf conditioning at UNILAC ...
Booster Test November 2021 Introduction The so called 'Booster Mode' shall be used to accumulate beam from multiple SIS18 injections into SIS100 at a rate of abo...
How To: Gateway Data Master UNILAC Pulszentrale Betrieb Kurzversion * das Gateway ist primitiv * am Gateway kann man nichts einstellen * das Gateway w...
How To: White Rabbit UNILAC PZ (wr unipz) Betrieb Betrieb und Rufbereitschaft Kurzversion * keine Einstellungen fuer Betrieb notwendig * nach SCU Reset ...
White Rabbbit UNILAC PZ (wr unipz) Introduction UNIPZ Figure: Most simplified view on UNIPZ (upper part). It is a combination of a Super UNIPZ and seven UNI...
How To: Flash a Timing Receiver with a Gateware/Firmware Image TL;DR * disable all software on the host (FESA, saftd, ...) * SCU only: disable the watchdog...
Remote debugging of a running saft daemon with GDB It is possible to connect GDB to a running SCU, set breakpoints, step through the code, print variables, etc. T...
Monitor local system time of a WRS via SNMP 1. Introduction WRS synchronises its local time with an external NTP server, if one is specified in CONFIG_NTP_SERVER...
PEXP Testing and Commissioning Guide Attention: This guide does not check the whole PCIe standard! Attention: This is NOT for FAT Required component...
Saftlib Latency Measurements During the startup of the accelerator in February 2021, issues have been observed with the so called function generator (FG): Occasio...
Reading the DM status To get an overview on whats running on a DM, you can get the basic status by issuing root@tsl017 ~ # dm cmd dev/wbm0 or root@tsl017 ~ # dm...
Documentation of Data Master Error Messages Parser Errors caused by faulty schedule data If any of the following error messages are reported to you or appear in ...
Sending Stuff from GSI Elsewhere THIS HOWTO IS DEPRECATED Requirements * ebiss Account @ GSI, see here * Account number ("Kostenstelle" or "Auftragsnumme...
How To: TMIS Introduction TMIS (Timing Message Information Service) is a quick evaluation on distribution of timing messages via the ACC controls network. The ma...
Timing Messages: How To Snoop the Timing System News FEC for FESA class is now scuxl0143. Introduction This is a first simple solution to view what is going on ...
How To: Configuring and using Altera Ethernet Blaster to flash DM PRO * Download current gateware archive, unpack * Copy jic file to tmp directory on tsl021...
How To: Setting Up a Linux Box Intended usage: E Release For older releases please check out the history of this Wiki page. Introduction This how to describes se...
How To: saft ctl Introduction This tool is intended to diagnose the status saftlib and provide ECA related information of a timing receiver. Moreover one can do ...
How To: saft dm Introduction This tool (saft dm: "saft Data Master") is intended to provide a primitive Data Master for local operations in the FEC. This tool mi...
White Rabbit, BuTiS, Clocks and Time Introduction Two systems exist for distribution of time stamps and clocks: 1. The General Machine Timing System provides ...
Testing and Commissioning Guide for Pexaria5 Required components * Pexaria5 under test (named as P5UT in this guide) * PC with Intel Quartus (version 18...
Enigma Release (DEPRECATED) Previous releases are Asterisk, Balloon, Cherry and Doomsday. This release has been replaced by release Fallout. New Features and Bu...
Gateware and Firmware Gateware and firmware are provided with releases. * Gateware: synthesized (V)HDL code * Firmware: compiled code for the lm32 soft CPU ...
Releases and Snapshots of the Timing System Release A Timing Firmware Release packs together new features and requirements defined in our Development Road Map, ...
How To: saft io ctl Introduction Use this tool to configure I/Os and setup rules for I/Os in the ECA. Usage IO CTL for SAFTlib Usage: saft io ctl OPTIONS Ar...
How To: Connecting a Timing Receiver to the White Rabbit Network A timing receiver MUST NOT be connected to a White Rabbit network without authorization. Authori...
How To: LM32 Soft CPU Compiler Introduction This how to describes the status and how to build the compiler for the lm32 soft cpu. Links * on github (for be...
How To: Poor Man's (d, m, w) Path to Device Access Introduction This How To is not even a how to. Instead, it is just a collection of stuff required to develop a...
White Rabbit Switch Hardware 4.0 Overview This page summarizes the GSI requirements in context with the development of a new version of the White Rabbit Switch. ...
How To: saft lcd Introduction This is a an experimental GSI specific command line tool for live display of Beam Production Chains (BPC). Usage via Command Line ...
How To: LM32 Soft CPU Introduction Soft CPUs are a VDHL implementation of a CPU in a FPGA. With FAIR Timing Receivers, Soft CPUs are directly embedded in the Wis...
Report: Latency and Loss of Timing Messages in the Timing System Introduction Starting in October 2019 the ECA Tap module was added to the gateware of a few dedi...
AMC Testing and Commissioning Guide Required components for each uTCA device * SFP (green/purple) * LC cable and a white rabbit switch (Recommended: RUN...