Snapshot "January 2016"

The intention of this snapshot is twofold. First, to make improvement of White Rabbit available at GSI. Second, to provide again a consistent set of hardware, gateware, firmware and software. Backwards compatibility to Asterisk is provided in most cases, but it is NOT recommended to continue using old gateware. Timing receiver nodes and SCU should be flashed with images provided by this snapshot.

The snapshot "January 2016" is compatible to the control system release R7. Roll-out is intended for January 2016.

Snapshot Term and Conditions:

• Best effort support. We can't guarantee that we can recreate a problem in "production" in our test system.
• Bug-fixes are NOT going to be added to the Snapshot and rolled out. This bug-fixes will be presented in the next Snapshot or Release.

GIT

The snapshot is provided as tag "snapshot_180116" in bel_projects.

Hardware

Form Factor	Carrier	WR	add-on	Commissioning	Remark
standalone	EXPLODER5A	WREX1/WREX2A	EXPLODER5ADB2	click
PCIe	PEXARIA5A	WREX1	PEXARIA5DB1/2	click	"fixed" PEXARIA5 boards are compatible
SCU2	SCU2	WREX1	(MIL)
SCU3	SCU3	on carrier	(MIL)
VME	VETAR2A	WREX1	VETAR1DB2A	click

Timing Receiver Nodes

Images

Type	rpd	sof	jic	jed	date
PEXARIA5A	pci_control.rpd	pci_control.sof	pci_control.jic	pexaria5-cpld.jed	18/01/2016
EXPLODER5A	exploder5.rpd	exploder5.sof	exploder5.jic	exploder5-cpld.jed	18/01/2016
SCU2	scu2_control.rpd	scu2_control.sof	scu2_control.jic		19/01/2016
SCU3	scu3_control.rpd	scu3_control.sof	scu3_control.jic		21/01/2016
VETAR2A	vetar2a.rpd	vetar2a.sof	vetar2a.jic		18/01/2016

Table: Images for nodes.

Software

Type	Tarball	Path	Comment
build environment for software	snapshot-2016-Jan-18.tar.xz	/common/usr/timing/fec/R6.1	includes etherbone and saftlib
run-time system for etherbone	etherbone_2016-jan-21.tar.xz	/common/export/etherbone	nfsinit: 20_etherbone -> ../global/etherbone
run-time system for saftlib	saftlib_snapshot_180116.tar.gz	/common/export/saftlib	nfsinit: 30_saftlib -> ../global/saftlib

Table: Software.

Data Master

Remark: Stuff for Data Master is git, branch "dm3", tag "dmv03".

Type	rpd	firmware	tool	remark	date
PEXARIA5A	ftm.rpd	ftm.bin	ftm-ctl	DM v3	18/01/2016

Table: Images for data master on PEXARIA5A.

Resources

There are four types of I/Os.

• unidirectional single-ended I/O clocked at 125 MHz (1 gpio line connected to FGPA)
• bidirectional single-ended I/O clocked at 125 MHz (2 gpio lines connect to FPGA)
• unidirectional differential I/O clocked at 1 GHz (1 lvds pair connected to FPGA)
• bidirectional differential I/O clocked at 1 GHz (2 lvds pairs connected to FPGA)

The general rules for connecting the I/Os to the resources (ECA, TLU) are determined by the "monster" design. The following rules apply:

• TLU (Timestamp Latch Unit)
  • each input is connected to a dedicated TLU fifo
  • bidirectional inputs are connected first
• ECA ( Event-Condtion-Action unit)
  • all outputs are connected to the ECA
  • channel 0: receiving component are 125 MHz outputs (gpio)
  • channel 1: receiving component is action queue and MSI. MSI serves to signal events (IRQ) while the event data are stored in the queue until they are retrieved, typically via the host system.
  • channel 2: receiving component are 1 GHz outputs (lvds), bidirectional outputs are connected first.

Please note:

• All bidirectional IOs have a output and input connected to the FPGA. The direction is determined via a control line by the FPGA. Hence, each bidirectional IO is connected to the ECA (outgoing) and the TLU (incoming).
• In many cases a differential IO at the front panel is connected to the FPGA using a single ended line and vice versa.
• Changing the direction of bidirectional IO on-the-fly is not supported.

Resource	EXPLODER	PEXARIA	SCU	VETAR2A + DB2	remark
bidi IO 1..N	Reserve1..8	(TTLIO1..3)	(B1..2)	N/A	(not configurable on-the-fly)
	TRIG1 1..8
	TRIG2 1..8
IN 1..N	TTL In 1..8	TTLIO1	B2	IN1..2
	ANY In 1..8	LVDS1..2		IN
				LVDS1..2
				1x MHDMR
OUT 1..N	TTL Out 1..8	TTLIO2..3	B1	OUT1..6
	LVDS Out 1..8	LVDS3..4		OUT
	ECL Out 1..8
				LVDS3..4
				2x MHDMR
GND	LVDS Out 9	LVDS5	N/A	LVDS5
TLU 1..N	TTL In 1..4	TTLIO1..3	B2	LVDS1..2
	ANY In 1..4	LVDS1..2		1x MDHMR
	TRIG1 1..4			IN
	TRIG2 1..4
ECA channel 0 1..N	TTL Out 1..4	BaseLEDs 5..8	B1	TTLOUT1..6	125 MHz IO
	LVDS Out 1..4	AddonLEDs 1..4
	ECL Out 1..4
	TRIG(1+2) 1..4
ECA channel 1	USB, lm32	PCIe, USB, lm32	PCIe, lm32	VME, USB, lm32	Action Q
ECA channel 2 1..N	N/A	TTLIO1..3	N/A	N/A	1 GHz IO
200 MHz out	(TTL Out 8 *)	(LVDS3 *)	N/A	(LVDS3 *)	"BuTiS c2"
	LVDS Out 8			1x MHDMR
	ECL Out 8
100 kHz + TS out	N/A	(LVDS4 *)	N/A	(LVDS4 *)	"at the next tone it will be..."
				1x MHDMR
PPS out	TTL Out 6	N/A	USERLED 1	OUT	use eca-pps if needed
	LVDS Out 6
	ECL Out 6
WR ext clkin (10MHZ)	TTL In 8	N/A	N/A	IN2	for grandmaster mode
WR ext PPS in	TTL In 7	N/A	N/A	IN1	for grandmaster mode
remark		TTLIO1 next to LVDS5

Table: I/O assignment on the different form factors. BuTiS related signals marked by (*) are only available via a dedicated bitstream for Experiment Electronics.

Version Check of Runtime Environment

Timing Receiver gateware and the host environment can be checked for the correct versions.

Gateware
Use eb-flash and check for Build type  : snapshot_180116. Below is an example for the SCU3:

[ruth@scuyl4711 ~]# eb-info dev/wbm0
Project     : scu_control
Platform    : scu3 +comexpress
FPGA model  : Arria II GX (EP2AGX125EF29C5)
Build type  : snapshot_180116
Build date  : Thu Jan 21 15:29:15 CET 2016
Prepared by : Stefan Rauch <s.rauch@gsi.de>
Perpared on : belpc098
OS version  : Ubuntu 14.04.3 LTS, kernel 3.13.0-74-generic
Quartus     : Version 13.1.0 Build 162 10/23/2013 SJ Full Version

  7ae4c8b submodules: use correct etherbone library location
  dc12463 build: cleaning etherbone should wipe out previously configured prefix
  797b4f1 build: install etherbone to correct location
  f10d15d wrpc-sw: update submodule
  5bb1a66 wr-cores: update submodule to wr-core v3 CERN release

Etherbone
Use eb-ls and check for Version: etherbone 1.1 (14c0b13). Below is an example:

[ruth@scuyl4711 ~]# eb-ls -h
Usage: eb-ls [OPTION] <proto/host/port> <address/size> <value>

  -a <width>     acceptable address bus widths     (8/16/32/64)
  -d <width>     acceptable data bus widths        (8/16/32/64)
  -r <retries>   number of times to attempt autonegotiation (3)
  -n             do not recursively explore nested buses
  -v             verbose operation
  -q             quiet: do not display warnings
  -h             display this help and exit

Report Etherbone bugs to <etherbone-core@ohwr.org>
Version: etherbone 1.1 (14c0b13): Dec 15 2015 15:20:29
built by dbeck on Jan 21 2016 13:32:51 with asl732 running Scientific Linux release 6.6 (Carbon)
Licensed under the LGPL v3.

Saftlib
Use saft-ctl and check for source version: saftlib 0.1 (0b71d1f). It should also be checked, that at least one device such as baseboard is attached. Below is an example:

[ruth@scuyl4711 ~]# saft-ctl asdfjkl -i
source version                  : saftlib 0.1 (0b71d1f): Aug 06 2015 16:14:30
build info                      : built by terpstra on Aug  6 2015 16:15:11 with asl731 running Scientific Linux release 6.6 (Carbon)
devices attached on this host   : 1
  device: /de/gsi/saftlib/baseboard, name: baseboard, path: dev/wbm0

More Information

• Obtaining the sources is described in this How-To.
• Building images is described in this How-To.

-- DietrichBeck - 22 Jan 2016