Multi-purpose control API implementation on HadCon2

git

git.gsi.de

gitlab repository

repository: https://git.gsi.de/HadCon2/Firmware/HadCon2
- !HadCon2 : Microcontroller Code
  - Branches: (q.v. Git Workflow)
    - 4.x.y: version
    - master: (link to subversion)
    - dev: branch to consolidate before committing/merging into master
Access
- read: https
- further access on request, ask P.Zumbruch
  - needs login access to git.gsi.de to become a member

Tar Balls & ELFs

Tar ball, including ELFs

	x.0	x.1	x.2	x.3	x.4	x.5	x.6
1.x	1.0
2.x	2.0	2.1
3.x	3.0	3.1
4.x	4.0	4.1	4.2	4.3	4.4	4.5
				4.3.1	4.4.1	4.5.1	4.6.1
				4.3.2	4.4.2		4.6.2
							4.6.2.1
				4.3.2
				4.3.3
							4.6.3-Apfel
							4.6.3_MM

HadCon2 - ELF 32-bit LSB executable, Atmel AVR 8-bit, version 1 (SYSV), statically linked, not stripped

	x.0	x.1	x.2	x.3	x.4	x.5	x.6
1.x
2.x
3.x
4.x				4.3.2 - hadcon1
				4.3.2 - hadcon2
				4.3.3 - hadcon1
				4.3.3 - hadcon2
					4.4.1 - hadcon1
					4.4.1 - hadcon2
							4.6.2
							4.6.2.1


							4.6.3-Apfel
							4.6.3_MM

Programming:
- using avrdude you can program: (asuming HadCon2 jtag chain)
  $> avrdude -v -P /dev/ttyUSBx -pc128 -c jtagmkI -x jtagchain=0,1,0,8 -Uflash:w:<hadcon>.elf
  - Don't forget setting fuses, to be done when HadCon2 is programmed the first time:
    $> avrdude -v -P /dev/ttyUSBx -pc128 -c jtagmkI -x jtagchain=0,1,0,8 -Uefuse:w:0xff:m -Uhfuse:w:0x19:m -Ulfuse:w:0xe0:m
HadCon Note
In case of HadCon(1) use jtagchain=0,1,0,4 instead
- using obsolete avarice you can program: (asuming HadCon2 jtag chain)
  avarice -c 0,1,0,8 --jtag /dev/ttyUSBx -B 1000000 --erase --program --file <hadcon>.elf
  - Don't forget setting fuses, to be done when HadCon2 is programmed the first time:
    avarice -c 0,1,0,8 --jtag /dev/ttyUSBx -B 1000000 -W ff19e0
HadCon Note
In case of HadCon(1) use jtagchain=0,1,0,4 instead

-- PeterZumbruch - 2020-12-11

ATMEL

Toolchain & Access

Prerequisites

programming with olimex: /dev/olimex
access: /dev/hadcon2 An automatic assignment of specified USB devices to those dev ports is described here
at "usbdev - dynamic dev symbolic link and proper access rights"

AVR

AVR - gcc based
- avr : e.g. zypper se avr
- Warning: reading http://www.nongnu.org/avr-libc/bugs.html pointing to http://gcc.gnu.org/bugzilla/show_bug.cgi?id=30289 tells us, that memset is wrong compiled
  - avr-gcc 3.3.5 - OK
  - fixed in 4.1.3, 4.2 branch, and >= 4.3.0.
  - typically you get 4.1.2
avr-gcc, avr-libc
- openSuse - Repository: (from: http://www.mikrocontroller.net/articles/AVR_Eclipse#openSuSE)
  1. zypper ar http://download.opensuse.org/repositories/CrossToolchain:/avr/openSUSE_13.1/ <Some Name>
  2. zypper install avr-libc cross-avr-gcc

avrdude

AVRDUDE - AVR Downloader/UploaDEr
- AVRDUDE is a utility to download/upload/manipulate the ROM and EEPROM contents of AVR microcontrollers using the in-system programming technique (ISP).
- https://www.nongnu.org/avrdude/
Programming:

$> avrdude -v -P /dev/ttyUSBx -pc128 -c jtagmkI -x jtagchain=0,1,0,8 -Uflash:w:<hadcon>.elf
- Don't forget setting fuses, to be done when HadCon2 is programmed the first time:
  $> avrdude -v -P /dev/ttyUSBx -pc128 -c jtagmkI -x jtagchain=0,1,0,8 -Uefuse:w:0xff:m -Uhfuse:w:0x19:m -Ulfuse:w:0xe0:m
HadCon Note
In case of HadCon(1) use jtagchain=0,1,0,4 instead

avarice

obsolete alternative to avrdude
- Development of avarice has been discontiuned
- avarice: http://avarice.sourceforge.net

Programming:

avarice -c 0,1,0,8 --jtag /dev/ttyUSBx -B 1000000 --erase --program --file <hadcon>.elf
- Don't forget setting fuses, to be done when HadCon2 is programmed the first time:
  avarice -c 0,1,0,8 --jtag /dev/ttyUSBx -B 1000000 -W ff19e0
HadCon Note
In case of HadCon(1) use jtagchain=0,1,0,4 instead
Note:
- avarice does not support the --program feature from version 2.12 on, so make sure you have maximal 2.11.
Local build:
1. Download sources :
  - avarice-$av_version (local copy)
2. Patches
  1. Download patches for g++ -version ≥ 6.4:
    - $av_version
      - patch.avarice-$av_version.$av_file
      %NEXT{"av_version"}%
  2. Apply Patches:
    - $av_version
      - patch src/$av_file < patch.$av_version.$av_file
      %NEXT{"av_version"}%
3. build
  - - ./configure && make or
    - ./configure && make && make install
Pitfalls & Obstacles:

Docs / Tutorials / Help

AVR Knowledge:
- AVR Tutorial (german): http://www.mikrocontroller.net/articles/AVR-GCC-Tutorial
- Helper to show memory consumption add it to PATH
  - avr-mem.sh: avr-mem (original from http://www.mikrocontroller.net/topic/52953 http://www.mikrocontroller.net/attachment/18841/avr-mem.sh)
- AVR http://www.rn-wissen.de/index.php/Avr-gcc (german)
  - Tipps and Tricks: http://www.rn-wissen.de/index.php/Avr-gcc#Optimierungen.2C_Tipps_.26_Tricks (german)
- AVR libc manual: http://www.nongnu.org/avr-libc/user-manual/index.html

Supported devices

1-wire

Family code	Device and datasheet
10h	DS18S20 1-Wire Parasite-Power Digital Thermometer
28h	DS18B20 1-Wire Programmable Resolution 1-Wire Digital Thermometer
20h	DS2450 1-Wire Quad A/D Converter
3Ah	DS2413 1-Wire Dual Channel Addressable Switch
05h	DS2405 1-Wire Addressable Switch
29h	DS2408 1-Wire 8-Channel Addressable Switch

Tweaks

Program Space (Harvard Architecture)

Program space:
- http://www.nongnu.org/avr-libc/user-manual/pgmspace.html
- http://www.mikrocontroller.net/articles/AVR-GCC-Tutorial#Speicherzugriffe (german)
  - http://www.mikrocontroller.net/articles/AVR-GCC-Tutorial#Programmspeicher_.28Flash.29 (german)

Memory usage

Memory usage:
- http://www.rn-wissen.de/index.php/Speicherverbrauch_bestimmen_mit_avr-gcc#Dynamischer_RAM-Verbrauch (german)

-- PeterZumbruch - 2020-08-04

-- PeterZumbruch - 2020-12-10

Operation

Basic Operation Principles

The basic operation principle is that

Any device communicates via the USB interface with the μController sending and receiving keyword based ASCII streams/strings (see Protocol for details)
- input string is terminated by <LF> or <CR>
μController provides the communication with the (external) devices

In general a command and its possible response e.g. HELP is sent/retrieved from the master to the ATMEL with e.g. by listening to /dev/ttyUSBx while sending the command to the same device, i.e. in the easiest case (including an endless while loop for an automatic reconnect)
$> while :; do sleep 1; cat /dev/ttyUSBx; done & $> echo "HELP" >/dev/ttyUSBx
replace x by the corresponding integer
To access the device the user has to have the right permissions, e.g. dialout, use ls and groups to find out current settings
$> ls -l /dev/ttyUSB* crw-rw-rwT 1 root users 188, 0 Jan 21 10:38 /dev/ttyUSB0 crw-rw---T 1 root dialout 188, 1 Jan 21 10:38 /dev/ttyUSB1 $> groups epics epics : epics dialout epicsadm
It might be necessary that the properties of the serial devices has to be changed. Currently these stty are working
$> stty -F /dev/ttyUSBx -opost -onlcr -isig -icanon -iexten -echo -echoe -echok -echoctl -echoke 115200

Output settings:

-opost
do not post-process output

-onlcr
do not translate newline to carriage return-newline
Local settings:

-isig
do not enable interrupt, quit, and suspend special characters

-icanon
do not enable erase, kill, werase, and rprnt special characters

-iexten
do not enable non-POSIX special characters

-echo
do not echo input characters

-echoe
do not echo erase characters as backspace-space-backspace

-echok
do not echo a newline after a kill character

-echoctl
do not echo control characters in hat notation ('^c')

-echoke
kill all line by obeying the echoctl and echok setting

115200
sets the speed to 115200 Bit/s

Communication Tools

Linux

cat / echo


             $> stty -F /dev/ttyUSBx -opost -onlcr -isig -icanon -iexten -echo -echoe -echok -echoctl -echoke 115200  

             $> while :; do sleep 1; cat /dev/ttyUSBx; done & 

             $> echo "HELP" >/dev/ttyUSBx

replace x by the corresponding integer

hadcon

IRC-like environment with command history (over several sessions) and command line editing all included

requires tmux installed
copy the following three commands to your ~/bin
- hadcon
- hadcon_command_only.pl (remove the .txt at end of filename)
- slurp_serial


             $> stty -F /dev/ttyUSBx -opost -onlcr -isig -icanon -iexten -echo -echoe -echok -echoctl -echoke 115200  

             $> hadcon /dev/ttyUSBx

replace x by the corresponding integer

picocom


  picocom --b 115200 -l /dev/ttyUSBx -d 8 -p n -f n --echo --omap crlf --imap lfcrlf

replace x by the corresponding integer

udev/usbdev - dynamic device symbolic link and proper access rights

Prerequisites: you have to have admin rights.

How to

edit/create /etc/udev/rules.d/99-serial-permissions.rules
- add the follwing line for general includes
  SUBSYSTEMS=="usb", ATTRS{idVendor}=="0403", SYMLINK+="$env{ID_SERIAL}", GROUP="users", MODE="0666"
  creates for every connected device of vendor id 0403 a symbolic link /dev/ to the connected device
- for special devices those lines can be added in addition
  SUBSYSTEMS=="usb", ATTRS{idVendor}=="0403", ENV{ID_SERIAL}=="FTDI_FT232R_USB_UART_A100dQ2B", SYMLINK+="hadcon2", GROUP="users", MODE="0666" SUBSYSTEMS=="usb", ATTRS{idVendor}=="0403", ENV{ID_SERIAL}=="FTDI_FT232R_USB_UART_A600801P", SYMLINK+="olimex", GROUP="users", MODE="0666"
- for special devices (e.g. HadCon2) those lines can be added in addition
  - SUBSYSTEMS=="usb", ATTRS{idVendor}=="0403", ENV{ID_SERIAL}=="FTDI_FT232R_USB_UART_A100*", RUN+="/usr/bin/stty -F /dev/$kernel -opost -onlcr -isig -icanon -iexten -echo -echoe -echok -echoctl -echoke 115200 "
  - SUBSYSTEMS=="usb", ATTRS{idVendor}=="0403", ENV{ID_SERIAL}=="FTDI_FT232R_USB_UART_A801*", RUN+="/usr/bin/stty -F /dev/$kernel -opost -onlcr -isig -icanon -iexten -echo -echoe -echok -echoctl -echoke 115200 "
to find out the IDs of connected systems
udevadm info --export-db| grep FTDI| grep ID_SERIAL
Finally reload rules and trigger a reconnect:

udevadm control --reload-rules udevadm trigger

Links

"Writing udev rules": http://reactivated.net/writing_udev_rules.html
udev: https://wiki.ubuntuusers.de/udev/
"Tutorial on how to write basic udev rules in Linux": https://linuxconfig.org/tutorial-on-how-to-write-basic-udev-rules-in-linux

-- PeterZumbruch - 2020-11-09

Windows

Beginning with version 4.6.2 a fix provides also direct access for Windows.

PuTTY: A Free Telnet/SSH Client

http://www.chiark.greenend.org.uk/~sgtatham/putty
- @GSI: use the "Softwarecenter" to install Putty.
you have to find out which COM port the HadCon2 is connected to: e.g. COM14
- e.g. "Windows+R" → "devmgmt.msc" → (COM & LPT), before and after connecting HadCon2
settings:
- basic options:
- connection options:
- terminal options:
then open a serial session to the COM port, e.g. COM14

LabVIEW

LabVIEW 2013 Instrument Driver
- try putty first to check basic communication

-- PeterZumbruch - 2020-11-10

Protocol

Protocol

General

CPU → μController

HELP

SEND

SPI

Structure: <Keyword, 3-5 letters, (capital letters)> <Message>

NOTE: from version 4.6.1 on all command keywords are case insensitive
string termination (automatically) by <LF> or <CR>

μController → CPU

RECV followed by the sent command keyword and the 'result'
nothing, usually send actions
- can be made more verbose by increasing the debug level via DEBG <debug level>, <debug level> > 0
  - RECV <literal acknowledge>*
ERRx in case of an error
- ERRx <Error number> <Error description>
- ERRx <Error number> <Error description> *** "<Additional Information>"
- ERRx "<Command>" <Error number> <Error description>
- ERRx "<Command>" <Error number> <Error description> *** "<Additional Information>"
- where 'x' can be
  - G : global errors
  - A : api errors, e.g. typos, wrong arguments, inputs, syntax, out of limits, etc.
  - C : CAN related global errors
  - M : CAN related message box errors
  - T : I²C errors, Two-Wire-Interface
  - U : undefined

HELP

HELP

$ HELP : will give an overview list of available commands, e.g. :


    RECV HELP --- available commands are:
    RECV HELP --- SEND : send can message
    RECV HELP ---           SEND CAN-ID ID-Range [RTR <nBytes> D0 .. D7]
    RECV HELP --- SUBS : unsubscribe can id/mask
    RECV HELP ---           SUBS CAN-ID ID-Range
    RECV HELP --- USUB : unsubscribe can id/mask
    RECV HELP ---           USUB CAN-ID ID-Range
    RECV HELP --- RGWR : write register
    RECV HELP ---           RGWR <Register> <Value>
    RECV HELP --- RGRE : read register
    RECV HELP ---           RGRE <Register>
    RECV HELP --- RADC : AVR ADCs
    RECV HELP ---           RADC [<ADC Channel>]
    RECV HELP --- OWAD : 1-wire ADC
    RECV HELP ---           OWAD [ID [flag_conv [flag_init]]]
    RECV HELP --- OWDS : 1-wire double switch
    RECV HELP ---           OWDS [ID]
    RECV HELP --- INIT : (re)init of system
    RECV HELP --- OWLS : 1-wire list devices
    RECV HELP ---           OWLS [<Family Code>]
    RECV HELP --- OWSS : 1-wire single switch ([ID] not implemented)
    RECV HELP ---           OWSS [ID]
    RECV HELP --- RSET : reset via watchdog
    RECV HELP --- PING : 
    RECV HELP --- OWTP : 1-wire temperature
    RECV HELP ---           OWTP [ID [flag_conv [flag_init]]
    RECV HELP ---           OWTP <command_keyword> [arguments]]
    RECV HELP --- OWSP : one-wire set active pins/bus mask
    RECV HELP ---           OWSP <bus mask>
    RECV HELP --- CANT : CAN send message
    RECV HELP ---           CANT CAN-ID ID-Range [RTR <nBytes> D0 .. D7]
    RECV HELP --- CANS : CAN subscribe
    RECV HELP ---           CANS CAN-ID ID-Range
    RECV HELP --- CANU : CAN unsubscribe
    RECV HELP ---           CANU CAN-ID ID-Range
    RECV HELP --- DBGL : set/get debug level
    RECV HELP ---           DBGL [level]
    RECV HELP --- DBGM : set/get debug system mask
    RECV HELP ---           DBGM [mask]
    RECV HELP --- JTAG : set/get JTAG availability, switch off/enable 4 more ADC channels
    RECV HELP ---           JTAG [0|1]
    RECV HELP --- HELP : help
    RECV HELP ---           HELP [CMND]
    RECV HELP ---           HELP <mode>
    RECV HELP --- OWRP : 1-wire read active pins/bus mask
    RECV HELP --- DEBG : set/get debug level and mask
    RECV HELP ---           DEBG [level [mask]]
    RECV HELP --- PARA : parasitic device presence test
    RECV HELP --- SHOW : show (internal) settings
    RECV HELP ---           SHOW [key_word]
    RECV HELP --- OWSA : 1-wire API settings
    RECV HELP ---           OWSA <command_key_word> [arguments] 
    RECV HELP --- TWIS : I2C access
    RECV HELP ---           TWIS <0|1> <I2C address> <data length> <byte1 ... byte8>
    RECV HELP --- I2C  : I2C access
    RECV HELP ---           I2C <0|1> <I2C address> <data length> <byte1 ... byte8>
    RECV HELP --- RLTH : relay threshold
    RECV HELP ---           RLTH [command_key_word] <value>
    RECV HELP --- SPI  : experimental SPI master (slave)
    RECV HELP ---           SPI [data]
    RECV HELP ---           SPI <cmd> <arguments>
    RECV HELP --- GNWR : waveform generator write data
    RECV HELP ---           GNWR <address> <data>
    RECV HELP --- GNRE : waveform generator read data
    RECV HELP ---           GNRE <address>
    RECV HELP --- OW8S : 1-wire octal switches
    RECV HELP ---           OW8S [ID [value]]
    RECV HELP --- VERS : code version

A more detailed command description you'll get by using the command:


   HELP <command>

-- PeterZumbruch - 2020-11-09 - 12:09

CAN

Keyword	Action	Format	Description	Comments

SEND CANT	Send CAN Message	SEND `<CAN Message-ID> <ID-Range> [<RTR> <Length> <Data0 ... Data7>]` CANT `<CAN Message-ID> <ID-Range> [<RTR> <Length> <Data0 ... Data7>]` response: RECV `<MOB-number> <CAN Message-ID> <ID-Range> [<RTR> <Length> <Data0 ... Data7>]` future response: RECV `<CAN Message-ID> <ID-Range> [<RTR> <Length> <Data0 ... Data7>]`	Message-ID: CAN Message Identifier (hex) ID-Range: used as mask on Message IDs (hex) RTR: sets Remote Transmission Request Mode Length: number of data bytes to send (max: 8) Data 0...7: 0 to 8 data bytes (hex) MOB-number: index of receiving MOB (Message Object Blocks) in CAN controller
SUBS CANS	Subscribe to Message-IDs	SUBS `<CAN Message-ID> <ID-Range>` CANS `<CAN Message-ID> <ID-Range>` response: nothing	Subscribe to react on (a range of) CAN Messages Message-ID: CAN Message Identifier (hex) ID-Range: used as mask on Message IDs (hex)	TODO: look to code, has to be clarified
USUB CANU	Unsubscribe from Message-IDs	USUB `<CAN Message-ID> <ID-Range>` CANU `<CAN Message-ID> <ID-Range>` response: nothing	Unsubscribe from reacting on (a range of) CAN Messages Message-ID: CAN Message Identifier (hex) ID-Range: used as mask on Message IDs (hex)	TODO: look to code, has to be clarified
CAN	CAN commands	CAN `<sub command> [ <arguments>> ... ]` response: ...	Replacing above commands by sub commoands	TODO:

-- PeterZumbruch - 2020-11-09 - 12:08

SPI

NOTE: only even number of digits per argument are allowed

Api Basic Operation Principle

HadCon 2 Multipurpose Controls Api Basic Operation

General Operation

SPI

Serial Peripheral Interface

HadCon(2)

bytes

MOSI

MISO

automatically ( Basic Operation ),
semi-automatically ( Advanced Operation ), or
manually ( Expert Operation )

Basic Operation

"Single Command Operation": All necessary steps are taken automatically, optional behavior can be achieved by changing the configuration.

Example task:


   SPI write dc 7f 8f8fb4 0123456789abcdef be

equivalent to


   SPI dc 7f 8f8fb4 0123456789abcdef be

This write command includes the following steps:

optionally purge read buffer

(default
TRUE)
purge write buffer
filling the write buffer
by decomposing input byte by byte
⇒ dc 7f 8f 8f b4 01 23 45 67 89 ab cd ef be
set cs
- setting the defined chip-select pin(s) to "active low"
  - optionally masked by an external mask
transmit/receive
byte by byte in the given byte-order
- transmit write buffer content
- attaching received bytes to the end of the read buffer
release cs
- release the defined chip-select pins(s) to "passive high"
  - optionally masked by an external mask
optionally purge write buffer
(default: FALSE)

The read buffer content can be shown as follows:

last read element

SPI read
last read 3 elements

SPI show_read_buffer 3 1
first read 6 elements

SPI show_read_buffer 6
the full content

SPI show_read_buffer

See

read

show_read_buffer

Advanced Operation

The user can prepare step by step the write buffer before automatically sending it.

Example sequence: add/write_buffer

 
    SPI purge_read_buffer      // optionally
    SPI purge_write_buffer     // optionally     
   
    SPI add dc 7f              
    SPI add 8f8fb4             // repeat until write buffer is full
    SPI add 0123456789abcdef   //
    SPI add be                 //
   
    SPI show_write_buffer      // optionally
   
    SPI write_buffer           
   
    SPI write_buffer           // e.g. repeat it, if auto_purge is OFF
   
    SPI write_buffer 02        // only activate second chip select pin, by masking it with 0x02

The write_buffer command includes all remaining necessary steps:

set cs
- setting the defined chip-select pin(s) to "active low"
  - optionally masked by an external mask
transmit/receive
byte by byte in the given byte-order
- transmit write buffer content
- attaching received bytes to the end of the read buffer
release cs
- release the defined chip-select pins(s) to "passive high"
  - optionally masked by an external mask
optionally purge write buffer

Example sequence: write/write_buffer

 
    SPI write dc 7f 8f8fb4 0123456789abcdef be 
    SPI write_buffer           // e.g. repeat it, if auto_purge is OFF
   ...              
    SPI write_buffer
    SPI write_buffer 02        // only activate 2nd chip select pin, by masking it with 0x02
    SPI write_buffer 01        // only activate 1st chip select pin
    SPI write_buffer fc        // only activate the other chip select pins

Reading: see

Basic Operation

Expert Operation

The user has full control on setting and releasing chip select pins.

Example sequence: selected chip select

 
    SPI purge_read_buffer     // optionally
    SPI purge_write_buffer    // optionally     
    SPI add dc 7f 8f8fb4 0123456789abcdef be              

    SPI cs                    // get status of defined chip select pins
    SPI cs_bar                // same as above but with "active low" logic

    SPI cs_set                // set all available chip select pins to "active"
    SPI transmit           
    SPI cs_release            // set all available chip select pins to "passive"

    SPI cs_set 01             // only activate 1st chip select pin to "active"
    SPI transmit           
    SPI cs_release            // set all available chip select pins to "passive"

    SPI cs_set fe             // only activate the other chip select pins to "active"
    SPI transmit           
    SPI cs_release ee         // set masked chip select pins to "passive", keep 5th "active"
    SPI cs_release 10         // set masked chip select pins to "passive", keep 5th "active"

Reading: see

Basic Operation

Main Commands

SPI

Format

SPI w/write

Task

send list of bytes to clients, including predefined purge, chip-select behavior

Format

SPI write <list of data bytes|words|dwords|qwords>
SPI w <list of data bytes|words|dwords|qwords>

nothing
if DEBG > 0
RECV SPI write OK

add list of data byte by byte to the write buffer

As described in section Basic Operation

Arguments

list of data bytes|words|dwords|qwords|...

Comments

Maximum single number length 24 digits
only byte-wise sending allowed
see SPI cs_select_mask
see SPI auto_purge_write_buffer
see SPI auto_purge_read_buffer
see SPI transmit_report
see SPI transmit_byte_order

SPI a/add

Task

Format

SPI add <list of data bytes|words|dwords|qwords>
SPI a <list of data bytes|words|dwords|qwords>

Response

nothing
if DEBG > 0
RECV SPI add OK

Arguments

list of data bytes|words|dwords|qwords|...

Comments

Maximum single number length 24 digits

SPI wb/write_buffer

Task

send write buffer content to clients, including predefined purge, chip-select behavior,
optionally selecting chip select pins

Format

SPI write_buffer [ <Chip Select Mask> ]
SPI wb [ <Chip Select Mask> ]

       RECV SPI write_buffer

Arguments

optional: external chip select mask:
- [ 0 ... FF]
- each bit represents a cs pin
  - 1:active, 0:inactive

send write buffer content to clients, w/o any chip select manipulation

see SPI auto_purge_write_buffer
see SPI auto_purge_read_buffer
see SPI transmit_report
see SPI transmit_byte_order
see SPI cs_pins

SPI t/transmit

Task

Format

SPI transmit
SPI t

nothing
if DEBG > 0
RECV SPI transmit OK

Arguments

sets (selected) chip select pins to "active low"

see SPI transmit_report
see SPI transmit_byte_order

SPI css/cs_set

Task

Format

SPI cs_set [ <Chip Select Mask> ]
SPI css [ <Chip Select Mask> ]

       RECV SPI cs 1:1 2:- 3:- 4:- 5:- 6:- 7:- 8:-

On success cs is called to show the current status

Arguments

optional: external chip select mask:
- [ 0 ... FF]
- each bit represents a cs pin
  - 1:active, 0:inactive

releases (selected) chip select pins to "passive high"

see SPI cs_select_mask
see SPI cs

SPI csr/cs_release

Task

Format

SPI cs_release [ <Chip Select Mask> ]
SPI csr [ <Chip Select Mask> ]

       RECV SPI cs 1:1 2:- 3:- 4:- 5:- 6:- 7:- 8:-

Arguments

optional: external chip select mask:
- [ 0 ... FF]
- each bit represents a cs pin
  - 1:active, 0:inactive

read the last element filled into the read buffer

see SPI cs_select_mask
see SPI cs

SPI r/read

Task

Format

SPI read
SPI r

       RECV SPI read <value>

show (partial) content of write buffer

read the last element filled into the read buffer
depending on the transmit_byte_order : * 0, MSB: last element (FIFO) * 1, LSB: first element (LIFO)

Arguments

Return values

<value>
- "--" , if read buffer is empty
- last byte filled [0 .. FF]

Comments

see SPI transmit_byte_order

SPI sw/show_write_buffer

Task

Format

SPI show_write_buffer [<Number of Bytes> [<Reverse Flag>]]
SPI sw [<Number of Bytes> [<Reverse Flag>]]

Response

w/o any arguments,
buffer filled, ≤ 8 bytes:

SPI sw RECV SPI show_write_buffer elements: 0x5 (5) RECV SPI show_write_buffer 10 00 10 21 42
w/o any arguments,
buffer filled, > 8 bytes:

SPI sw RECV SPI show_write_buffer elements: 0x14 (20) RECV SPI show_write_buffer (#1) 10 00 10 21 42 51 25 01 ... RECV SPI show_write_buffer (#2) 10 10 10 00 10 21 42 51 ... RECV SPI show_write_buffer (#3) 25 01 10 10
w/ <Number of Bytes> set, <Number of Bytes> ≠0,
buffer empty:

SPI sw 3 RECV SPI show_write_buffer --
w/ <Number of Bytes> set, e.g. 4,
buffer filled, ≤ 8 bytes:

SPI sw 4 RECV SPI show_write_buffer 10 00 10 21
w/ <Number of Bytes> set, e.g. 0xA,
buffer filled, > 8 bytes:

SPI sw a RECV SPI show_write_buffer (#1) 10 00 10 21 42 51 25 01 ... RECV SPI show_write_buffer (#2) 10 10
w/ <Number of Bytes> set, e.g. 2,
w/ <Reverse Flag> flag set ( TRUE,HIGH,ON,1 )
buffer filled, ≤ 8 bytes,

SPI sw 2 TRUE RECV SPI show_write_buffer 10 10
w/ <Number of Bytes> set, e.g. 9,
w/ <Reverse Flag> flag set ( TRUE,HIGH,ON,1 )
buffer filled, > 8 bytes:

SPI sw 9 1 RECV SPI show_write_buffer (#1) 00 10 21 42 51 25 01 10 ... RECV SPI show_write_buffer (#2) 10

Description

Shows (partial) content of write buffer. Depending on the optional arguments the set can be reduced to a sub set of the buffer, beginning from the first element filled or reverse beginning with the last elements added. Depending on the number of elements requested, additional information is added:

if all elements are show a summary line is added, with the given number of elements in the buffer in hex and decimal
if the number of elements to show exceed 8
- a line counter (#i), starting from 1, is added in front
- "..." are added at the end of the line, if more lines follow

Arguments

<Number of Bytes>
- max number of bytes to show, ≥ 0
  - 0: all available
  - else: show <Number of Bytes> elements from beginning (1) to maximum <Number of Bytes>
<Reverse Flag>
- flag to revert direction of interest
  - 0,FALSE,OFF,LOW: show <Number of Bytes> elements from beginning (1) to maximum <Number of Bytes>
  - else: show <Number of Bytes> elements from <number of elements> - <Number of Bytes> until last added element

Comments

SPI sr/show_read_buffer

Task

show (partial) content of read buffer

Format

SPI show_read_buffer [<Number of Bytes> [<Reverse Flag>]]
SPI sr [<Number of Bytes> [<Reverse Flag>]]

Response

w/o any arguments,
buffer filled, ≤ 8 bytes:

SPI sr RECV SPI show_read_buffer elements: 0x5 (5) RECV SPI show_read_buffer 10 00 10 21 42
w/o any arguments,
buffer filled, > 8 bytes:

SPI sr RECV SPI show_read_buffer elements: 0x14 (20) RECV SPI show_read_buffer (#1) 10 00 10 21 42 51 25 01 ... RECV SPI show_read_buffer (#2) 10 10 10 00 10 21 42 51 ... RECV SPI show_read_buffer (#3) 25 01 10 10
w/ <Number of Bytes> set, <Number of Bytes> ≠0,
buffer empty:

SPI sr 3 RECV SPI show_read_buffer --
w/ <Number of Bytes> set, e.g. 4,
buffer filled, ≤ 8 bytes:

SPI sr 4 RECV SPI show_read_buffer 10 00 10 21
w/ <Number of Bytes> set, e.g. 0xA,
buffer filled, > 8 bytes:

SPI sr a RECV SPI show_read_buffer (#1) 10 00 10 21 42 51 25 01 ... RECV SPI show_read_buffer (#2) 10 10
w/ <Number of Bytes> set, e.g. 2,
w/ <Reverse Flag> flag set ( TRUE,HIGH,ON,1 )
buffer filled, ≤ 8 bytes,

SPI sr 2 TRUE RECV SPI show_read_buffer 10 10
w/ <Number of Bytes> set, e.g. 9,
w/ <Reverse Flag> flag set ( TRUE,HIGH,ON,1 )
buffer filled, > 8 bytes:

SPI sr 9 1 RECV SPI show_read_buffer (#1) 00 10 21 42 51 25 01 10 ... RECV SPI show_read_buffer (#2) 10

Description

Shows (partial) content of read buffer. Depending on the optional arguments the set can be reduced to a sub set of the buffer, beginning from the first element filled or reverse beginning with the last elements added. Depending on the number of elements requested, additional information is added:

if all elements are show a summary line is added, with the given number of elements in the buffer in hex and decimal
if the number of elements to show exceed 8
- a line counter (#i), starting from 1, is added in front
- "..." are added at the end of the line, if more lines follow

Arguments

<Number of Bytes>
- max number of bytes to show, ≥ 0
  - 0: all available
  - else: show <Number of Bytes> elements from beginning (1) to maximum <Number of Bytes>
<Reverse Flag>
- flag to revert direction of interest
  - 0,FALSE,OFF,LOW: show <Number of Bytes> elements from beginning (1) to maximum <Number of Bytes>
  - else: show <Number of Bytes> elements from <number of elements> - <Number of Bytes> until last added element

Comments

Clean-up

SPI p/purge

Task

purge write and read buffer

Format

SPI purge
SPI p

nothing
if DEBG > 0
RECV SPI purge OK

purges write and read buffer, by internally calling purge_write_buffer and purge_read_buffer

Arguments

resets SPI interface and SPI parameter settings to their default status

see SPI purge_write_buffer
see SPI purge_read_buffer

SPI pw/purge_write_buffer

Task

purge write buffer

Format

SPI purge_write_buffer
SPI pw

Response

nothing
if DEBG > 0
RECV SPI purge_write_buffer OK

Description

Arguments

Comments

only resets the number of elements to 0, not the data

SPI pr/purge_read_buffer

Task

purge read buffer

Format

SPI purge_read_buffer
SPI pr

Response

nothing
if DEBG > 0
RECV SPI purge_read_buffer OK

Description

Arguments

Comments

only resets the number of elements to 0, not the data

SPI reset

Task

Format

SPI reset

nothing
if DEBG > 0
RECV SPI reset OK

Arguments

reports current status of (selected) chip select lines

see SPI status

Status

SPI s/status

Task

Show status

Format

SPI status
SPI s
SPI

Response

       RECV SPI status 
      RECV SPI cs 1:0 2:- 3:- 4:- 5:- 6:- 7:- 8:- 
      RECV SPI cs_bar 1:1 2:- 3:- 4:- 5:- 6:- 7:- 8:- 
      RECV SPI cs_pins 1:PORTB,0 
      RECV SPI cs_select_mask FF 
      RECV SPI control_bits 50 
      RECV SPI spi_enable TRUE 
      RECV SPI data_order 0 
      RECV SPI master TRUE 
      RECV SPI clock_polarity 0 
      RECV SPI clock_phase 0 
      RECV SPI speed 0 
      RECV SPI double_speed TRUE 
      RECV SPI speed_divider 4 (2500000Hz @ 10000000Hz) 
      RECV SPI transmit_byte_order 0 (MSB/big endian) 
      RECV SPI transmit_report FALSE 
      RECV SPI auto_purge_read_buffer TRUE 
      RECV SPI auto_purge_write_buffer FALSE 
      RECV SPI show_write_buffer elements: 0xd (13) 
      RECV SPI show_write_buffer (#1) AB BB AA BB CC EE FF 66 ... 
      RECV SPI show_write_buffer (#2) 54 12 45 54 58 
      RECV SPI show_read_buffer elements: 0 (0)

Description

recursive call of all available status information

Arguments

Comments

SPI cs

Task

Format

SPI cs [<Chip Select Mask>]

Response

w/o mask

SPI cs RECV SPI cs 1:0 2:- 3:- 4:- 5:- 6:- 7:- 8:-
w/ mask, eg. 0b01100001 = 0x71

SPI cs 71 RECV SPI cs 1:0 6:- 7:-

Description

Arguments

optional [<Chip Select Mask>]
- [ 0 ... FF]
- each bit represents a cs pin
  - 1:chosen, 0:ignore

Response

list of <Pin States>
- syntax <Pin States>:
  - <Index>:<State>
    - <Index>: 1 ... 8
    - <State>:
      - 1: HIGH
      - 0: LOW
      - -: undefined, channel not connected

Comments

SPI csb/cs_bar

Task

reports current inverted status of (selected) chip select lines

Format

SPI cs_bar [<Chip Select Mask>]
SPI csb [<Chip Select Mask>]

Response

w/o mask

SPI csb RECV SPI cs_bar 1:1 2:- 3:- 4:- 5:- 6:- 7:- 8:-
w/ mask, eg. 0b01100001 = 0x71

SPI csb 71 RECV SPI cs_bar 1:1 6:- 7:-

Description

Arguments

optional <Chip Select Mask>
- [ 0 ... FF]
- each bit represents a cs channel/pin
  - 1:chosen, 0:ignore

Response

list of <Pin States>
- syntax <Pin States>:
  - <Index>:<State>
    - <Index>: 1 ... 8
    - <State>:
      - 1: LOW
      - 0: HIGH
      - -: undefined, channel not connected

SPI cs_pins

Task

report current chip select channel configurations

Format

SPI cs_pins [<CS Channel Index>]

w/o argument

SPI cs_pins RECV SPI cs_pins <List of active <Index>:<PORTx>,<Pin> CS Configurations>
- e.g.:
  
  RECV SPI cs_pins 1:PORTB,0 2:PORTA,4 3:PORTG,4 7:PORTF,5
w/ <CS Channel Index>

SPI cs_pins <CS Channel Index> RECV SPI cs_pins <Index><PORTx>,<Pin>,<Status>
- e.g.:
  
  SPI cs_pins 1 RECV SPI cs_pins 1:PORTB,0,ON

Arguments

optional <CS Channel Index>
- chip select index
- 1 ... 8

Return values

<List of active <Index>:<PORTx>,<Pin> CS Configurations>
or
<<Index>:<PORTx>,<Pin>,<Status> CS Configuration>
- <Index>
  - chip select index
  - 1 ... 8
- <PORTx>
  - PORTx
    - x: A ... G
- <Pin>
  - pin number of PORTx
    - 0 ... 7
- <Status>
  - status of chosen chip select index
    - ON: active
    - OFF: deactivated

get / set external chip select mask

see SPI cs_add_pin
see SPI cs_remove_pin

Chip Select Configuration

SPI cs_select_mask

Task

Format

SPI cs_select_mask [<Chip Select Mask>]

Response

       RECV SPI cs_select_mask <Value>

Description

The chip select mask allows to select a subset of the available, defined chip select channels.
Each bit of this mask represents a channel which can be selected or ignored.
This mask is used in all cases where chip select actions are required and not explicitly given.

w/o argument: the current mask is shown
w/ argument: <Value> is assigned to the configuration

Arguments

optional, <Value>
- chip select mask
- range [0 ... FF]
- each bit represents a chip select channel
  - 1:chosen, 0:ignore

Comments

SPI csap/cs_add_pin

Task

add chip select channel configuration

Format

SPI cs_add_pin <Symbolic Output Port Address> <Output Port Pin> [<Channel Select Index/Slot>]
SPI csap <Symbolic Output Port Address> <Output Port Pin> [<Channel Select Index/Slot>]

RECV SPI cs_pins <List of active <Index>:<PORTx>,<Pin> CS Configurations>

see SPI cs_pins

Description

Allows to add up to 8 output port PORTX:Pin combinations to act as channel select channels. Provided the chosen slots aren't used yet or the address set is already defined (see SPI cs_pins, SPI cs_remove_pin).
A successful operation is reported via SPI cs_pins

w/o <Channel Select Index/Slot>:
- adds channel to next free slot
w/ <Channel Select Index/Slot>:
- adds channel to assigned index

Arguments

<Symbolic Output Port Address>
symbolic name for the available output port addresses
- PORTx
  - x: A ... G
<Output Port Pin>
- pin number of PORTx
  - 0 ... 7
optionally <Channel Select Index/Slot>
- chip select index
  - 1 ... 8

Comments

see SPI cs_pins
see SPI cs_remove_pin

SPI csrp/cs_remove_pin

Task

remove chip select channel configuration

Format

SPI cs_remove_pin <Channel Select Index/Slot>
SPI csrp <Channel Select Index/Slot>

RECV SPI cs_pins <List of active <Index>:<PORTx>,<Pin> CS Configurations>

see SPI cs_pins

Description

Removes a chip select configuration from set of pin configuration (see SPI cs_pins).
A successful operation is reported via SPI cs_pins.

Arguments

<Channel Select Index/Slot>
- chip select index
  - 1 ... 8

Comments

see SPI cs_pins
see SPI cs_add_pin

SPI Configuration

SPI c/control_bits

Task

set/get SPI hardware configuraton/status

Format

SPI control_bits [<Extended SPI Control Register>]
SPI c [<Extended SPI Control Register>]

e.g. :

       RECV SPI control_bits 50 
      RECV SPI spi_enable TRUE 
      RECV SPI data_order 0 
      RECV SPI master TRUE 
      RECV SPI clock_polarity 0 
      RECV SPI clock_phase 0 
      RECV SPI speed 0 
      RECV SPI double_speed TRUE 
      RECV SPI speed_divider 4 (2500000Hz @ 10000000Hz)

Allows to set/get the combined information/settings of the SPI Control Register SPCR and the SPI Status Register SPSR en bloc. Therefore those two registers are combinded into one 16bit data word with SPCR as LSB and SPSR as MSB. Since SPSR, despite its name, does have one control bit.

w/o <Extended SPI Control Register>:
- reports status
w/ <Extended SPI Control Register>:
- changes configuration

Note

all settings can be done alone using the functions described below. Success is reported via its get mode and the get functions of the seperate properties.

Arguments

<Extended SPI Control Register>
- 0 ... 1FF

get/set spi configuration's bit SPI enable state: SPE

See SPI spi_enable
See SPI data order
See SPI master
See SPI clock polarity
See SPI clock phase
See SPI speed
See SPI speed divider
See SPI double speed

SPI spi_enable

Task

Format

SPI spi_enable [<value>]

       RECV SPI spi_enable ==SPI enable state: SPE==

"When the SPE bit is written to one, the SPI is enabled. This bit must be set to enable any SPI operation."
(from Manual: AT90CANxx)

w/o argument: get value
w/ argument: set value

Arguments

<value>
- 0, 1, ≠0, ON, OFF, TRUE, FALSE

Comments

SPI data_order

Task

get/set spi configuration's bit SPI Data Order: DORD

Format

SPI data_order [<value>]

       RECV SPI data_order

"When the DORD bit is written to one, the LSB of the data word is transmitted first. When the DORD bit is written to zero, the MSB of the data word is transmitted first. "
(from Manual: AT90CANxx)

w/o argument: get value
w/ argument: set value

Arguments

<value>
- 0, 1, ≠0, ON, OFF, TRUE, FALSE

Comments

Don't mix up with API's transmit_byte_order

SPI master

Task

get/set spi configuration's bit SPI Master/Slave Select: MSTR

Format

SPI master [<value>]

       RECV SPI master

"This bit selects Master SPI mode when written to one, and Slave SPI mode when written logic zero. If SS [the 'Chip Select Pin'] is configured as an input and is driven low while MSTR is set, MSTR will be cleared"
(from Manual: AT90CANxx)

w/o argument: get value
w/ argument: set value

Arguments

<value>
- (0,) 1, ≠0, ON, (OFF), TRUE, (FALSE)

Comments

Slave mode not implemented

SPI clock_polarity

Task

get/set spi configuration's bit SPI Clock Polarity: CPOL

Format

SPI clock_polarity [<value>]

       RECV SPI clock_polarity

"When this bit is written to one, SCK is high when idle. When CPOL is written to zero, SCK is low when idle."
(from Manual: AT90CANxx)

CPOL Leading Edge Trailing Edge

0 Rising Falling

1 Falling Rising
w/o argument: get value
w/ argument: set value

Arguments

<value>
- 0, 1, ≠0, ON, OFF, TRUE, FALSE

Comments

SPI clock_phase

Task

get/set spi configuration's bit SPI Clock Phase: CPHA

Format

SPI clock_phase [<value>]

       RECV SPI clock_phase

"The settings of the Clock Phase bit (CPHA) determine if data is sampled on the leading (first) or trailing (last) edge of SCK."

CPHA	Leading Edge	Trailing Edge
0	Sample	Setup
1	Setup	Sample

(from Manual: AT90CANxx)

w/o argument: get value
w/ argument: set value

Arguments

<value>
- 0, 1, ≠0, ON, OFF, TRUE, FALSE

Comments

SPI speed

Task

get/set spi configuration's bits SPI Clock Rate Select 1/0: SPR1/0

Format

SPI speed [<value>]

       RECV SPI speed

"These two bits control the SCK rate of the device configured as a Master. SPR1 and SPR0 have no effect on the Slave. "
(from Manual: AT90CANxx)

w/o argument: get value
w/ argument: set value

Arguments

<value>

0 ... 3

speed	double speed	clock rate: SCK frequency
`0`	`OFF`	f_clkIO/4
`1`	`OFF`	f_clkIO/16
`2`	`OFF`	f_clkIO/64
`3`	`OFF`	f_clkIO/128
`0`	`ON`	f_clkIO/2
`1`	`ON`	f_clkIO/8
`2`	`ON`	f_clkIO/32
`3`	`ON`	f_clkIO/64

Comments

See SPI double speed

SPI speed_divider

Task

get/set spi configuration's Clock Rate Divider

Format

SPI speed_divider [<value>]

       RECV SPI speed_divider

Set the ratio between f_clkIO and SCK frequency

w/o argument: get value
w/ argument: set value

Arguments

<value>
- 2, 4, 8, 0x10, 0x20, 0x40, 0x80

get/set the transmit order the data bytes of the buffer are written to the devices

See SPI speed
See SPI double speed

SPI double_speed

Task

API Configuration

SPI transmit_byte_order

Task

Format

SPI transmit_byte_order [<value>]

Response

       RECV SPI transmit_byte_order

Description

w/o argument: get value
w/ argument: set value

Arguments

<value>
- 0, 1
  
  <value> transmit byte order
  
  0 MSB, big endian, FIFO
  
  1 LSB, little endian, LIFO

<value>	transmit byte order
0	MSB, big endian, FIFO
1	LSB, little endian, LIFO

Comments

SPI transmit_report

Task

get status of / enable/disable additional transmission reports after sending the write buffer

Format

SPI transmit_report [<value>]

Response

       RECV SPI transmit_report

$ Description:

w/o argument: get value
w/ argument: set value

Arguments

<value>
- 0, 1, ≠0, ON, OFF, TRUE, FALSE

Comments

SPI auto_purge_write_buffer

Task

get status of / enable/disable automatic write buffer purge after sending its content

Format

SPI auto_purge_write_buffer [<value>]

Response

       RECV SPI auto_purge_write_buffer

$ Description:

w/o argument: get value
w/ argument: set value

Arguments

<value>
- 0, 1, ≠0, ON, OFF, TRUE, FALSE

Comments

SPI auto_purge_read_buffer

Task

get status of / enable/disable automatic read buffer purge before sending data

Format

SPI auto_purge_read_buffer [<value>]

Response

       RECV SPI auto_purge_read_buffer

$ Description:

w/o argument: get value
w/ argument: set value

Arguments

<value>
- 0, 1, ≠0, ON, OFF, TRUE, FALSE

Comments

-- PeterZumbruch - 2020-11-09 - 12:15

DAC

DAC cmnd

Availablity

Channel numbers

0..7

DACOUTx

HadCon2/DAC

connector assignment

Commands

DAC : return all DACs value
DAC <CHANNEL> : return current DAC value
- <CHANNEL>: 0 - 7
DAC: <CHANNEL> <VALUE_mV> : set current DAC output to (approx.) wanted voltage
- <CHANNEL>: 0 - 7
- <VALUE_mV> - 0 - 3300 mV
  - : The actual resulting value might differ, due to the 8bit conversion binning of 3300mV / 255 ≈ 12,94 mV

Output

RECV DAC <CHANNEL> <VALUE_mV> <VALUE_HEX> [undefined]

<CHANNEL> : 0 - 7
<VALUE_mV> : 0 - 3300 mV, undefined → -1
<VALUE_HEX> : 0x00 - 0xFF, undefined → 0x100
undefined: since there is no readback, values are undefined until a value is set,
- exception: after a power up, channels are set to 0V.

DAC

-- PeterZumbruch - 2020-11-09 - 12:16

RGRE

Main
- RGRE cmnd

RGRE <Register>
<Register> : the register has to be written with hexadecimal value

Example command:
send: RGRE d8
receive: RECV RGRE d8 2

-- PeterZumbruch - 2020-11-09 - 12:05

RGWR

RGWR cmnd

Form:

RGWR <Register> <Value>

<Register> : the register address has to be written in hexadecimal

<Value> : here has to be written the new register value in hexadecimal

Example command:
( toggling LEDs, by writing 1 to the PING0-PING5 registers while DDRG are set to outputs )
send: RGRE 32
(e.g.:)
receive: RECV RGRE 32 1c (11100)
send: RGWR 32 7
receive: RECV RGWR 7: value 1b has been written and readback does not match (1b)
(since PINs are outputs)
send: RGRE 32
receinve: RECV RGRE 32 1b

-- PeterZumbruch - 2020-11-09 - 12:06

I2C

Form:
I2C <0|1> <I2C address> <data length> <byte1 ... byte8>

<0|1> : used to execute write or read operation. This is the Least Significant Bit (LSB) from the I2C address byte.

<I2C address> : Here has to be written the hexadecimal value on the address byte, which is shifted to right with one bit. The reason for the right shift is because, the lsb bit ist already used in the first field, where the working operation is choosen.

<data length> : data length

<byte1 ... byte8> : data

Example command:
send: I2C 0 70 1 08
receive: RECV I2C 0 70 01 08 -OK-

-- PeterZumbruch - 2021-03-15 - 17:49

APFEL

Apfel protocol code sequences

General Operation

APFEL

APFEL ASIC

q.v.Decoder.pdf

Logically
- Output:
  - CLK
    - quasi clock, only the level changes are important
  - DOUT
    - data out
  - Side Select
    - position
- Input:
  - DIN
    - data in
- GND
Electrical:
- 3.3 Volt

Physically:

per default:

JDINOUT1/2, JADC

I/O ports:

I/O port	A		C		F
Connector	`JDINOUT1`		`JDINOUT2`		`JADC`
pins	`DIN₁`	1	`DIN₁`	1	`DIN₁`	1
	`DOUT₁`	2	`DOUT₁`	2	`DOUT₁`	2
	`CLK₁`	3	`CLK₁`	3	`CLK₁`	3
	`SS₁`	4	`SS₁`	4	`SS₁`	4
	`DIN₂`	5	`DIN₂`	5	`DIN₂`	5
	`DOUT₂`	6	`DOUT₂`	6	`DOUT₂`	6
	`CLK₂`	7	`CLK₂`	7	`CLK₂`	7
	`SS₂`	8	`SS₂`	8	`SS₂`	8

Version 0

Commands

task	command	individual arguments	common address arguments	comment
*setDac*	`APFEL 9 <DAC value> <dac> <chipId> <pinSetId> <sideSelectId> <port> [<quiet>]` answer (if not quiet): → *readDac*	<DAC value> [ 0 ... 0x3FF ] <DAC> [ 1 ... 4 ]	<chipId> [ 0 ... 7, 8 ... FE, FF] 0xFF: generic call to all available chip Ids <pinSetId> [ 1, 2 ] <sideSelectId> [ 0,1 ] <port> A,C,F <quiet> [0,1]	writes DAC channel
*readDac*	`APFEL A <dac> <chipId> <pinSetId> <sideSelectId> <port>` answers: `RECV APFEL dac <port> <pinSetId> <sideSelectId> <chipId> <dac> <DAC value>` `ERRA APFEL dac <port> <pinSetId> <sideSelectId> <chipId> <dac> <DAC value> - read validity check failed, raw value:`	<DAC> [ 1 ... 4 ]		reads single DAC channel
*readAllDacs*	`APFEL A 0 <chipId> <pinSetId> <sideSelectId> <port>` answers: `RECV APFEL dac <port> <pinSetId> <sideSelectId> <chipId> 0 <DAC value1> <DAC value2> <DAC value3> <DAC value4>` `ERRA APFEL dac <port> <pinSetId> <sideSelectId> <chipId> <dac> <DAC value> - read validity check failed, raw value:`			Not Yet Available reads all DAC channels of an ch

*autocalib*	`APFEL B <chipId> <pinSetId> <sideSelectId> <port>`		auto calibration

*TP single*	`APFEL C <pulse height Pattern> <chipId> <pinSetId> <sideSelectId> <port>`	<pulse height Pattern> [ 2...3FF ]	test pulse
*TP reset*	`APFEL D <pulse height> <channel> <chipId> <pinSetId> <sideSelectId> <port>`	<pulse height Pattern> [ 1 ... F ] <channel> [ 1, 2 ]	test pulse inkl. reset
*TP trigger*	`APFEL 11 <on/off> <port> <pin> <trigger position>`	<on/off> [ 0,1 ] <port> [ A,B,C,D,E,F,G ] <pin> [1...8] <trigger after set (1) or after reset (2)> [1,2]		<on/off> enables/disables <pin> on <port> to trigger right in the moment after a test pulse set or reset command sequence is sent

*setAmpl*	`APFEL E <channel> <chipId> <pinSetId> <sideSelectId> <port>`	<channel> [ 1, 2 ]	setAmplification to high
*resetAmpl*	`APFEL F <channel> <chipId> <pinSetId> <sideSelectId> <port>`	<channel> [ 1, 2 ]	resetAmplification to low

*listId*	`APFEL 10 <all> <NChipIds> <pinSetId> <sideSelectId> <port>`	<all flag> [ 1...FF ] <number of chip Ids> [ 1...FF ]	check <number of chip Ids> channels and list depending on the <all flag> all or only positive results
*listId++*	`APFEL 20 <all> <NChipIds> <minChipId> <pinSetId> <sideSelectId> <port>`	<all flag> [ 1...FF ] <number of chip Ids> [ 1...FF ] <min Chip Id> [ 1...FF ]	check <number of chip Ids> channels and list depending on the <all flag> all or only positive results

First Test Results (16 Jan 2015)

First Test Results from 16 Jan 2015

programm uses inline functions.

Task Timings
		typical	best measured	"preHadCon2 Timings" ~× 8000
Clock Timing	T [µs]	44.8	24.8	400,000
Clock Timing	f [kHz]	22.3	40.3	0.0027
Function call overhead offset	[µs]	~330	~300
Task		typical	best measured
set DAC	[ms]	2.4	1.4
read DAC	[ms]	2.7	1.6
AutoCalibration	[ms]	48.4	27
AutoCalibration × 256 × 2	[s]	24.8	13.8
TestPulseSequence	[ms]	2.3	1.4
TestPulse	[ms]	4.7	2.7
SetAmplitude	[ms]	2.3	1.3
ResetAmplitude	[ms]	2.3	1.3

Original Notes

Logic Analyzer Results (14 Oct 2015)

Logic Analyzer Results

Summary (10 Oct 2015)

Task Timings
		typical	"preHadCon2 Timings" ~× 10⁴
Clock Timing	T [µs]	40	400,000
Clock Timing	f [kHz]	25 kHz	0.0027
Function call overhead offset	[µs]	~330
Task		typical
set DAC w/o readback	[ms]	2
read DAC	[ms]	2.3
set DAC w/ readback (estimate)	[ms]	4.3
AutoCalibration	[ms]	~155
AutoCalibration × 256 × 2 (estimate)	[s]	~80
TestPulseSequence	[ms]	2
complete TestPulse	[ms]	4
SetAmplitude	[ms]	2
ResetAmplitude	[ms]	2

Details (port A - 10 Oct 2015)

set DAC	`APFEL 9 3FF 3 1 1 1 A 1`	%FOREACH{"item" in="setDac_APFEL_9_3FF_3_1_1_1_A_1_2015-10-14.png"}% %NEXT{"item"}%
readDAC	`APFEL A 3 1 1 1 A`	%FOREACH{"item" in="readDac_APFEL_A_3_1_1_1_A_2015-10-14.png"}% %NEXT{"item"}%
autocalibration	`APFEL B 1 1 1 A`	%FOREACH{"item" in="autocalib_APFEL_B_1_1_1_A__2015-10-14.png"}% %NEXT{"item"}%
autocalibration (full)	`APFEL B 1 1 1 A`	%FOREACH{"item" in="autocalib_APFEL_B_1_1_1_A_(full)_2015-10-14.png"}% %NEXT{"item"}%
TP single	`APFEL C 3 1 1 1 A`	%FOREACH{"item" in="TP_single_APFEL_C_3_1_1_1_A_2015-10-14.png"}% %NEXT{"item"}%
TP reset ch1	`APFEL D 9 1 1 1 1 A`	%FOREACH{"item" in="TP_reset_APFEL_D_9_1_1_1_1_A_2015-10-14.png"}% %NEXT{"item"}%
TP reset ch2	`APFEL D 9 2 1 1 1 A`	%FOREACH{"item" in="TP_reset_APFEL_D_9_2_1_1_1_A_2015-10-14.png"}% %NEXT{"item"}%
TP reset ch1 incl. Trig, Pos 1	`APFEL D 9 1 1 1 1 A`	%FOREACH{"item" in="TP_reset_inkl_Trig_Pos_1_APFEL_D_9_1_1_1_1_A_2015-10-14.png"}% %NEXT{"item"}%
TP reset ch1 incl. Trig, Pos 2	`APFEL D 9 1 1 1 1 A`	%FOREACH{"item" in="TP_reset_inkl_Trig_Pos_2_APFEL_D_9_1_1_1_1_A_2015-10-14.png"}% %NEXT{"item"}%
set amplification	`APFEL E 2 1 1 1 A`	%FOREACH{"item" in="setAmplification_APFEL_E_2_1_1_1_A__2015-10-14.png"}% %NEXT{"item"}%
reset amplification	`APFEL F 2 1 1 1 A`	%FOREACH{"item" in="resetAmplification_APFEL_F_2_1_1_1_A_2015-10-14.png"}% %NEXT{"item"}%

Details (port F - 06 Nov 2015)

Trigger Level at 2.0V

set DAC	`APFEL 9 3FF 3 1 1 1 F 1`	%FOREACH{"item" in="setDac_APFEL_9_3FF_3_1_1_1_F_1_2015-11-06.png"}% %NEXT{"item"}%
readDAC	`APFEL A 3 1 1 0 F`	%FOREACH{"item" in="readDac_APFEL_A_3_1_1_0_F_2015-11-06.png"}% %NEXT{"item"}%
autocalibration	`APFEL B 1 1 1 F`	%FOREACH{"item" in="autocalib_APFEL_B_1_1_1_F_2015-11-06.png"}% %NEXT{"item"}%
TP single	`APFEL C 3 1 1 0 F`	%FOREACH{"item" in="TP_single_APFEL_C_3_1_1_0_F_2015-11-06.png"}% %NEXT{"item"}%
TP reset ch2	`APFEL D 9 2 1 1 1 F`	%FOREACH{"item" in="TP_reset_APFEL_D_9_2_1_1_1_F_2015-11-06.png"}% %NEXT{"item"}%
set amplification	`APFEL E 2 1 1 0 F`	%FOREACH{"item" in="setAmplification_APFEL_E_2_1_1_0_F_2015-11-06.png"}% %NEXT{"item"}%
reset amplification	`APFEL F 2 1 1 1 F`	%FOREACH{"item" in="resetAmplification_APFEL_F_2_1_1_1_F_2015-11-06.png"}% %NEXT{"item"}%

Version 1

$CMND <command> $ADDRESS [<Argument(s)>]

%FOREACH{"ADDRESS" in="<portLetter> <portIndex> <sideSelectionId> <chipId>"}% %FOREACH{"CMND" in="APFEL"}%

Overview

command	address			arguments		comment
command	address			"channel"	value(s)	comment
`dac`	<portLetter> A,C,F,	<pinSetId> [ 1, 2 ]	<sideSelectId> [ 1, 2 ]	<chipId> [ 0 ... 7, 8 ... FE, FF] 0xFF: generic call to all available chip Ids see command chipIdIgnoreMask for limiting the chipId range	<dacId> [ 1 ... 4 ] `< 4`, e.g. `0xA`: all DACs get value v_DAC1	[v_DAC1[v_DAC2[v_DAC3[v_DAC4]]]] [ 0 ... 0x3FF ]	read/writes up to 4 DAC channels (if set with sign, incr/decr relatively)
`autoCalib`						auto calibration of the DAC channels
`testPulse`				<channelId> [ 1 ... 2 ] `< 4`, e.g. `0xA`: both channels	height₁ [height₂] [ 0 ... 0xF ]	initiate test pulse
`ampl`				<channelId> [ 1 ... 2 ] `< 4`, e.g. `0xA`: both channels	[ amplification₁ [amplification₂] ] [ 0,1, H,L ] `0,L`: low amplification (× 16) `1,H`: high amplification (× 32)	get/set amplification mode
`l/list`						lists all addresses of available ids

%FOREACH{"command" in="dac"}% %FOREACH{"alternative" in="d"}%

$CMND $alternative/$command

Task

Format

NOTE: setting <chipId> to 0xFF loops over all avaiable chip IDs
read
- single DAC at port/pos/chipId:
  $CMND $command $ADDRESS <dacId>
- all 4 DACs at port/pos/chipId:
  $CMND $command $ADDRESS
- all 4 DACs of all available chipIds at port/pos:
  $CMND $command <portId> <sideSelectId>
write
- single DAC at port/pos/chipIds:
  $CMND $command $ADDRESS <dacId ≤ 4 > <value>
- all 4 DACs at port/pos/chipId with same value:
  $CMND $command $ADDRESS <dacId > 4> <value>
- all 4 DACs at port/pos/chipId with individual values:
  $CMND $command $ADDRESS <(dummy)> <value_DAC1> <value_DAC2> <value_DAC3> <value_DAC4>

single dac channel access

RECV $CMND $command $ADDRESS <dacId> <value>
any other plots per found chip

RECV $CMND $command $ADDRESS <dacId> <value_DAC1> <value_DAC2> <value_DAC3> <value_DAC4>

read or write values from/to DAC channel(s) (if set with sign, incr/decr relatively)

Arguments

<portId>
<posId>
<chipId>
<dacId>
<value>

--- %NEXT{"alternative"}%%NEXT{"command"}%

see cim/chipIdIgnoreMask

--- %NEXT{"alternative"}%%NEXT{"command"}%

%FOREACH{"command" in="autocalib"}% %FOREACH{"alternative" in="a"}%

$CMND $alternative/$command

Task
Format
Response
Description
Comments

%FOREACH{"command" in="testPulse"}% %FOREACH{"alternative" in="t"}%

$CMND $alternative/$command

Task
Format
Response
Description
Comments

--- %NEXT{"alternative"}%%NEXT{"command"}%

%FOREACH{"command" in="ampl"}%

$CMND $command

Task
Format
Response
Description
Comments

--- %NEXT{"command"}%

%FOREACH{"command" in="list"}% %FOREACH{"alternative" in="l"}%

$CMND $alternative/$command

Task
Format
Response
Description
Comments

--- %NEXT{"alternative"}%%NEXT{"command"}%

%NEXT{"CMND"}% %NEXT{"ADDRESS"}%

-- PeterZumbruch - 2015-07-09

-- PeterZumbruch - 2016-02-19

Performance

Performance Tests