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EPICS on CBM's Xilinx Virtex4/5 FPGAs

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It is the proposed idea to follow the Siemens standard System Development Methode, stdSEM (engl.) / stdSEM (deutsch) (Registration needed)

1. General Documents

2. Project Overview

2.1. Introduction

2.1.1. CBM Virtex based EPICS Control System

The future FAIR Experiment CBM intends to use Virtex4 based front-end electronics implementing an EPICS based control system for remote setup configuration and run/process control.

2.2. Initiation

2.2.1. Kick-off

2.2.2. Project enterprise decided

  • CbmVirtexPrimaryRequirements
  • CbmVirtexProposedSolution
  • CbmVirtexRiskAnalysis
  • CbmVirtexQualityAssurance
q.v. Meeting Minutes July 6, 2007

2.3. Definition

  • CbmVirtexRequirementsSpecification
  • CbmVirtexExternalInterfaces and devices

2.4. Design

  • CbmVirtexArchitecturalDesignSpecification
  • CbmVirtexDetailedDesignSpecifications

2.5. Implementation

2.6. Operation

3. Project Steps Documentation

3.1. Xilinx ML403 Virtex 4 evaluation platform

3.1.1. Installation of μClinux on Virtex 4's PPC architecture using KIPs VMware image based XXX framework

Norbert Abel (KIP), showed how to use the tools developped at KIP to easily install μClinux on Xilinx's Virtex4 ... using a pre-release of their framework
... more.

3.1.2. EPICS

Steps to have an IOC running on the Virtex FPGA ... read more
-- PeterZumbruch - 13 June 2007

4. Legacy/Attic

In this section older projects documentations are stored

4.1. ml403 virtex4 evaluation board


The future DAQ controls needs to be tested on a potential hardware. In order to do so an evaluation board of Xilinx was bought. I (M.Stockmeyer) have the priviledge to use and test it. Please refer to the installation guide if you are not familiar with this kind of hardware:

First M403 Installation
Software Installation
EPICS cross compilation for Power PC

last change: -- MarcRStockmeier - 08 Nov 2005

-- PeterZumbruch - 10 Nov 2009
Topic revision: r8 - 2009-11-10, PeterZumbruch - This page was cached on 2024-05-30 - 16:49.

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