connects to | |
---|---|
USART0 | FTDI (USB) |
USART1 | FPGA |
Multiplexer out | Device | Signals | |
---|---|---|---|
ATMEL's SDA/SCL | SD0/SC0 | DAC1: 4-channel DAC (DAC5574) | DACOUT1 ... DACOUT3 |
DAC2: 4-channel DAC (DAC5574) | DACOUT4 ... DACOUT7 | ||
SD1/SC1, SDA1 / SCL1 | Connector JDI2C1 | ||
SD2/SC2, SDA2 / SCL2 | |||
SD3/SC3, SDA3 / SCL3 | |||
SD4/SC4, SDA4 / SCL4 | |||
SD5/SC5 | 2 × Single-Channel 1-Wire Master | OWIO0 ... OWIO1 | |
SD6/SC6 | 2 × Single-Channel 1-Wire Master | OWIO2 ... OWIO3 | |
SD7/SC7 | 2 × Single-Channel 1-Wire Master | OWIO4 ... OWIO5 |
Device | I2C sub address | Signals | ||
---|---|---|---|---|
A2 | A1 | A0 | ||
U2: 8-channel I2C-bus multiplexer | 0 | 0 | 0 | OWIO0 |
0b1110sssd, s:hardware selectable, d:direction R/\\bar(W)
Write = channel selection; Read = channel status | ||||||||
D7 | D6 | D5 | D4 | B3 | B2 | B1 | B0 | Command |
---|---|---|---|---|---|---|---|---|
X | X | X | X | 0 | X | X | X | no channel selected |
0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | channel 0 enabled; power-up/reset default state |
X | X | X | X | 1 | 0 | 0 | 0 | channel 0 enabled |
X | X | X | X | 1 | 0 | 0 | 1 | channel 1 enabled |
X | X | X | X | 1 | 0 | 1 | 0 | channel 2 enabled |
X | X | X | X | 1 | 0 | 1 | 1 | channel 3 enabled |
X | X | X | X | 1 | 1 | 0 | 0 | channel 4 enabled |
X | X | X | X | 1 | 1 | 0 | 1 | channel 5 enabled |
X | X | X | X | 1 | 1 | 1 | 0 | channel 6 enabled |
X | X | X | X | 1 | 1 | 1 | 1 | channel 7 enabled |
PB5 (OC1A)
[...] pulling the RESET pin LOW resets the I2C -bus state machine causing all the channels to be deselected, except Channel 0 so that the master can regain control of the bus (from the manual].
Device | I2C sub address | Signals | |
---|---|---|---|
A1 | A0 | ||
U3: Single-Channel 1-Wire Master | 1 | 0 | OWIO0 |
U6: Single-Channel 1-Wire Master | 1 | 1 | OWIO1 |
U4: Single-Channel 1-Wire Master | 1 | 0 | OWIO2 |
U7: Single-Channel 1-Wire Master | 1 | 1 | OWIO3 |
U5: Single-Channel 1-Wire Master | 1 | 0 | OWIO4 |
U8: Single-Channel 1-Wire Master | 1 | 1 | OWIO5 |
Device | I2C sub address | Signals | |
---|---|---|---|
A1 | A0 | ||
UDAC1: 4-channel DAC (DAC5574) | 1 | 0 | DACOUT1 ... DACOUT3 |
UDAC2: 4-channel DAC (DAC5574) | 0 | 0 | DACOUT4 ... DACOUT7 |
OE
pin is connected to ATMEL's TOSC2
, by pulling it down, it decouples overlapping JTAG input from ADC inputs ADC4-7
PC0
... PC8
down to GND
SWITCH1 | Connector Pins | AT90CAN128 via 4.7kΩ | SWITCH2 | Connector Pins | AT90CAN128 via 4.7kΩ | |
---|---|---|---|---|---|---|
1 | PC0 (A8 ) |
1 | PC4 (A12 ) |
|||
2 | PC1 (A9 ) |
2 | PC5 (A13 ) |
|||
4 | PC2 (A10 ) |
4 | PC6 (A14 ) |
|||
8 | PC3 (A11 ) |
8 | PC7 (A15/CLK0 ) |
RESET
(pin20) to 3.3V via 10kΩ
JUSB1
connector, or DCPower
GND | Can be found on several Connectors | |
---|---|---|
5,0V | JCAN2 |
pin 4 |
3,3V | JCAN2 |
pin 6 |
AT90CAN128 | PG0 ( WR ) |
♦ red | inverse logic: 0: on 1: off |
---|---|---|---|
AT90CAN128 | PG1 ( RD ) |
♦ yellow | inverse logic: 0: on 1: off |
AT90CAN128 | PG2 (ALE ) |
♦ orange | inverse logic: 0: on 1: off |
pin | color | logic | |
MachX02 | PL4A |
♦ yellow | |
MachX02 | PL4B |
♦ orange | |
MachX02 | PL4C |
♦ yellow | |
MachX02 | PL4D |
♦ orange | |
MachX02 | PL5A |
♦ red | |
MachX02 | PL5B |
♦ yellow | |
MachX02 | PL5C |
♦ orange | |
MachX02 | PT17D "DONE" |
♦ red |
JDINOUT1 | Connector Pins | AT90CAN128 | JDINOUT2 | Connector Pins | AT90CAN128 | |
---|---|---|---|---|---|---|
1 | PA0 (AD0 ) |
1 | PC0 (A8 ) |
|||
2 | PA1 (AD1 ) |
2 | PC1 (A9 ) |
|||
3 | PA2 (AD2 ) |
3 | PC2 (A10 ) |
|||
4 | PA3 (AD3 ) |
4 | PC3 (A11 ) |
|||
5 | PA4 (AD4 ) |
5 | PC4 (A12 ) |
|||
6 | PA5 (AD5 ) |
6 | PC5 (A13 ) |
|||
7 | PA6 (AD6 ) |
7 | PC6 (A14 ) |
|||
8 | PA7 (AD7 ) |
8 | PC7 (A15/CLK0 ) |
|||
9/10 | GND | 9/10 | GND |
Connector Pins | AT90CAN128 | comments |
---|---|---|
1 | PF0 (ADC0 ) |
|
2 | PF1 (ADC1 ) |
|
3 | PF2 (ADC2 ) |
|
4 | PF3 (ADC3 ) |
|
|
||
5 | PF4 (ADC4 ) |
overlap with JTAG inputs of ATMEL, can be decoupled by pulling TOSC2 low |
6 | PF5 (ADC5 ) |
|
7 | PF6 (ADC6 ) |
|
8 | PF7 (ADC7 ) |
|
|
||
9/10 | GND |
Connector Pins | AT90CAN128 | comments |
---|---|---|
1 | PD2 (RXD1/INT2 ) |
USART1 RXD to connection to MachX02 or External Interrupt 2 Input |
2 | PD1 (TXD1/INT3 ) |
USART1 TXD to connection to MachX02 or External Interrupt 3 Input |
3 | PB0 ( SS ) |
Serial Peripheral Interface – SPI |
4 | PB1 (SCK ) |
|
5 | PB2 (MOSI ) |
|
6 | PB3 (MISO ) |
|
7 | PE6 (T3/INT6 ) |
Timer/Counter3 Clock Input or External Interrupt 6 Input |
8 | PE7 (ICP3/INT7 ) |
Timer/Counter3 Input Capture Trigger or External Interrupt 7 Input |
|
||
9/10 | GND |
Connector Pins | Signal | comments |
---|---|---|
1 | TCK |
10kΩ to V3_3 |
2 | GND |
|
3 | TDO |
← FPGA / Jumper J1 ← ATMEL |
4 | V3_3 |
|
5 | TMS |
|
6 | not connected | |
7 | V3_3 |
|
8 | not connected | |
9 | TDI |
→ ATMEL (→ FPGA) |
10 | GND |
JCAN1 | Connector Pins | Signal | comments |
---|---|---|---|
1 | CANL |
↔ CAN - High-speed Can Transceiver ATA6660 ↔ iCoupler Digital Isolator ↔ ATMEL | |
2 | CANH |
||
3/5 | VCAN_INPUT |
||
4/6 | GND_CAN |
JCAN2
provides optional CAN power supply, 1, GND_CAN
and pins 3/5
for common GND
2, VCAN
and pins 4
for 5,0V
or
2, VCAN
and pins 6
for 3,3V
JCAN2 | Connector Pins | Signal |
---|---|---|
1 | GND_CAN |
|
2 | VCAN |
|
4 | V5_0 |
|
6 | V3_3 |
|
3/5 | GND_CAN |
JMXOIO1 | Connector Pins | MachX02 | JMXOIO2 | Connector Pins | MachX02 | |
---|---|---|---|---|---|---|
1/2 | PT9A/B |
1/2 | PT15A/B |
|||
3/4 | PT10A/B |
3/4 | PT16A/B |
|||
5/6 | PT11A/B |
5/6 | PT16C/D |
|||
7/8 | PT12A/B |
7/8 | PT17A/B |
|||
9/10 | GND |
9/10 | GND |
Connector Pins | Multiplexer out | task | comment |
---|---|---|---|
1/2 | SD1/SC1 |
SDA1 / SCL1 | ATMEL's multiplexed SDA/SCL |
3/4 | SD2/SC2 |
SDA2 / SCL2 | |
5/6 | SD3/SC3 |
SDA3 / SCL3 | |
7/8 | SD4/SC4 |
SDA4 / SCL4 | |
9/10 | GND |
Connector Pins | Signal | Device | Device pin |
---|---|---|---|
1 | DACOUT0 |
UDAC1 | VoutA |
2 | DACOUT1 |
VoutB |
|
3 | DACOUT2 |
VoutC |
|
4 | DACOUT3 |
VoutD |
|
5 | DACOUT4 |
UDAC2 | VoutA |
6 | DACOUT5 |
VoutB |
|
7 | DACOUT6 |
VoutC |
|
8 | DACOUT7 |
VoutD |
|
9/10 | GND |
Connector Pins | Signal |
---|---|
1 | OWIO0 |
2 | OWIO1 |
3 | OWIO2 |
4 | OWIO3 |
5 | OWIO4 |
6 | OWIO5 |
7/8 | V3_3 |
9/10 | GND |
JOWIO1
, make sure to have (at least) 1 pull-up resistor of about 3.3kΩ on the data line of the 1-wire bus connected to the power VDD. JOWIO1
,.
JOWIO1
, this isn't necessary anymore, but keep in mind for other applications.
UFF2
has to be disconnected from its pad and removed
UFF2
to the solder pad of pin 5
UFF2
has to be disconnected from its pad and removed
UFF2
to the solder pad of pin 5