PMC Testing and Commissioning Guide
+++ Attention: This guide does not check the whole PCI/PMC standard! +++
+++ Attention: This is NOT for FAT +++
Required components for each PMC device
- SFP (green/purple)
- LC cable and a white rabbit switch (Recommended: RUNNING AT LEAST VERSION 4.1, if you can afford this)
- Quartus (Version 16.0.0 Build 211 was used for this guide)
- USB cable (micro 2.0)
- Power supply (if you don't use a crate)
- Xilinx programmer (Platform Cable USB II, DLC10)
- Altera USD blaster + PROMO11 adapter
- 5x LEMO cable(s)
- A second Timing Receiver with 5 LVTTL IOs (AMC, PMC, Exploder5, ...)
- $dev is a placeholder for dev/ttyUSB[X] AND dev/wbm[X] - you have to test both interfaces!
- $saftlib-dev is a placeholder for tr[X], baseboard[X], ...
Additional Resources
Preparation
- Check out bel_projects
- $ git checkout https://github.com/GSI-CS-CO/bel_projects.git
- $ cd bel_projects
- $ git checkout 1879cee [https://github.com/GSI-CS-CO/bel_projects/pull/101/commits/1879cee543c0b4a88656b7a11fa8be605787546d]
- $ ./fix-git.sh
- $ ./install-hdlmake.sh
- $ make
- (additional) $ make driver-install
- (additional) $ make etherbone-install
- (additional) $ make saftlib-install
- (additional) Use insmod to load the drivers oder restart
Important Steps
Programming the CPLD
- Turn on power
- Use Cosylab's boxed header to micro USB adapter and connect via JTAG (xilinx programmer)
- Run ISE
- Load project bel_projects/syn/gsi_pmc/cpld/pmc_prog.xise
- Process Menu => Implement Top Module
- Tools Menu => Impact
- Double-click Boundary Scan
- Control-I => pmc_prog.jed
- Operations Menu => Program
- Turn power off
Programming the FPGA
- Turn power on
- Connect JTAG via PROMO11 adapter
- Open Quartus and program the FPGA (or use the command line: quartus_pgm -c 1 -m jtag -o 'p;pmc.sof')
- (optional) Write this bit-stream into the SPI flash: eb-flash $dev pmc.rpd (in case USB and flash chip are already programmed)
Programming the USB Chip
- Run 'make' in bel_projects/ip_cores/etherbone-core/hdl/eb_usb_core
- Make sure, that no other timing receiver is attached by USB
- Erase the USB controller (as root): ./flash-fx2lp.sh -E
- Program the USB controller (as root): ./flash-fx2lp.sh
- Turn power off and on
Configuring (and programming) the SPI Flash Chip
- Program the FPGA again: quartus_pgm -c 1 -m jtag -o 'p;pmc.sof'
- Configure the SPI flash chip: eb-config-nv $dev 10 4
- [at room temperature] Write the bit-stream into the SPI flash: eb-flash $dev pmc.rpd (in case FPGA is not persistently programmed
- Turn power off and on
- [at high temperature > crate without cooling] Write the bit-stream into the SPI flash again: eb-flash $dev pmc.rpd
- Repeat 5. three times
- Go to bel_projects/ip_cores/wrpc-sw/tools
- Run "make"
- ./eb-w1-write $dev 0 320 < sdb-wrpc.bin
Check White Rabbit
- eb-console $dev
- Type in "gui", white rabbit status should be: locked and calibrated
- Remove and apply the fiber cable five times and make sure WR locks again
- Press ESC to quit
- Power cycle the device and repeat step #3 -> Watch the WR LEDs (the receiver should synchronize again)
Synchronization status should be: + Servo state: TRACK_PHASE + Phase tracking: ON You should also see 4 leds at the front panel: + red = traffic/no-link + blue = link + green = timing valid + white = PPS |
- Remove fiber cable
- Type in "mode master", node should be able to lock the PLL and become a master
Quit console
- (optional) Test status via Saftlib $ saft-ctl $saftlib-dev -s
Output should look like this: WR locked, time: 0x152c4f5bbfcf5528 receiver free conditions: 256, max (capacity of HW): 0(256), early threshold: 4294967296 ns, latency: 4096 ns |
Check External Reference Clock
- Provide a 10MHz clock (i.e. from a White Rabbit switch)
- Drive IO_CLKIN_EN to High $ saft-io-ctl $saftlib-dev -n IO_CLKIN_EN -d 1 (Note: In the foreseeable future it will work like this: $ saft-io-ctl $saftlib-dev -n IO5 -q 1)
- Open the White Rabbit console again and type in: mode master
- Check if WR is really locked (LED, eb-console -> GUI, generate clocks, ...)
- Additionally check if the system works with a 20MHz input clock too
- (optional) Turn off master mode (mode slave)
- (optional) Generate a clock on this and on another receiver and compare them
Check EEPROM and set MAC
- Run eb-console $dev
- (optional) Set MAC address for the device #xy: <<mac setp aa:bb:cc:dd:ee:ff, Control-C
- Check given MAC address
- Turn power off and on
- Run eb-console $dev
- Type in "mac", you should see the previously entered MAC address
- If you don't have a DHCP server, you can set an ip address by "ip set 192.168.100.xyz"
Check IOs
Front Panel IOs
- Get a second uTCA timing receiver (or a receiver with at least 5 LVTTL IOs)
- Connect IO1 (device #1) to IO1 (device #2) and so on... [IO1,IO2,IO3,IO4,IO5]
- Device #1: Turn output enable for the IOs on $ saft-io-ctl $saftlib-dev -n IO{1,2,3,4,5} -o 1
- Device #1: Start a clock on each IO $ saft-clk-gen $saftlib-dev -n IO{1,2,3,4,5} -f 10000000 0 (will generate a 10 MHz clock)
- Device #2: Snoop inputs $ saft-io-ctl $saftlib-dev -s
- Measure jitter and signal quality with a scope (FTRN specification should be matched)
Slew Rate
- Measure the slew rate with a scope (for EVERY IO), should be equal to Exploder5
IO Load Test
- Drive every IO with termination
- $ saft-io-ctl $saftlib-dev -n IO{1,2,3,4,5,...} -o 1 -t 0/1 -d 1
- Measure levels/voltage with a scope
Termination Test
- Drive every IO with and without termination
- Make sure that the switchable termination works
IO Bandwidth
- Generate a 200MHz clock (saft-clk-gen) and measure the clock with a scope
- Generate a 125MHz clock (with an additional receiver or reference device) and measure it with the ECA (saft-io-ctl snoop mode)
Output Enable Test
- Drive every IO with and without output enable
- Make sure you don't see a level change when output enable is turned off
- Check the LEDs, they should indicate every activity and the output enable status
Check PCI
- Try the following tools:
- eb-console $dev
- eb-info $dev
- eb-ls $dev
-
Write to internal shared ram and read it back:
- Get the LM32 shared ram address by eb-ls $dev
- Example output: 3.2 0000000000000651:81111444 84000 LM32-RAM-Shared
- Create a dummy file (which will be written into the ram): dd if=/dev/urandom of=foo bs=4k count=1;
- Write dummy file to the lm32 shared ram: eb-put $dev 0x84000 foo
- Get the data from the shared ram: eb-get $dev 0x84000/4096 bar
- Compare both files: cmp foo bar
- Both files should contain the same data
- Repeat this test in a loop... (recommended: 10 minutes)
Check PCI interrupts
- Create your own schedule (or use the attached one -> schedule.txt)
- Start snooping for events: $ saft-ctl $saftlib-dev snoop 0 0 0 -x
- Inject events: $ saft-dm $saftlib-dev -fp -n 1 schedule.txt
- Verify that you got all event
Check LEDs
- $ saft-pps-gen $saftlib-dev -s
- Leave the application running and check all LEDs
- $ saft-io-ctl $saftlib-dev -s
- Start rotating switches => Check output of saft-io-ctl
- Start pushing buttons => Check output of saft-io-ctl
IO . Edge . Flags .... ID ...................... Timestamp ........... Formatted Date --------------------------------------------------------------------------------------------------------- PBF Rising .... (0x0) 0xfffe000000000015 0x1532cdaf1fb0beb7 2018-05-28 12:09:35.666667191 PBF Rising .... (0x0) 0xfffe000000000017 0x1532cdaf24a84fe8 2018-05-28 12:09:35.750000616 |
Check Display
- cd bel_projects/tools/display
- make
- ./simple-display dev/ttyUSBx -s "Hello World!" -d 2
Check debug port HPLA
- To be defined
- Go to: tools/commissioning/onewire-scanner
- make
- run application: ./onewire-scanner dev/ttyUSB0
Output should look like this (OWID should be slightly different): Scanning for OneWire controller(s) on $dev now...
ID Wishbone Address OWID Serial Code Type ------------------------------------------------------------------------------- 00 0x0000000000060600 -- --- --- -- --- 00 0x32000009195de328 DS18B20 - Digital Thermometer -- --- 01 0x89000000ba822c43 DS28EC20 - 20Kb EEPROM
Found 1 OneWire controller(s) on $dev. Found 2 OneWire device(s)/slave(s) on $dev. |
Check OneWire Devices (eb-mon)
- Check device with eb-mon
root@pmc_carrier:~# eb-mon dev/wbm0 -w0 -b0 -f0x28 0xbd0000091958c628 root@pmc_carrier:~# eb-mon dev/wbm0 -w0 -t0 -f0x28 45.1875 |
Additional Tests (done by Cosylab)
MBOX
- Put PMC card into MBOX
- Perform tests "Check PCI" and "Check PCI interrupts" again
JTAG PMC Settings
- Check if JTAG <=> PMC bridge works
Address and Data Lines
Write (using PCI) to internal shared ram and read (using USB) it back:
- Get the LM32 shared ram address by eb-ls $dev
- Example output: 3.2 0000000000000651:81111444 84000 LM32-RAM-Shared
- Create a dummy file (which will be written into the ram): dd if=/dev/urandom of=foo bs=4k count=1;
- Write dummy file to the lm32 shared ram: eb-put $devPCI 0x84000 foo ($devPCI = dev/wbmX here!)
- Get the data from the shared ram: eb-get $devUSB 0x84000/4096 bar ($devUSB = dev/ttyUSBX here!)
- Compare both files: cmp foo bar
- Both files should contain the same data
- Repeat this test in a loop... (recommended: 10 minutes)