WR F50: Synchronizing the White Rabbit Data Master to 50 Hz Mains Introduction Stability of Linac RF systems are vital for a stable operation of UNILAC. As many ...
Gateway Data Master UNILAC PZ (dm unipz) Introduction dm unipz 'dm unipz' is the interface between the White Rabbit based Data Master und the MIL based UNILAC ...
Deprecated Documents This is just a unrevised collection of outdated or deprecated documents. * Feature List for a Timing Receiver Node at GSI/FAIR (09/2014)...
Documentation Some documentation is given here. This is not structured but just a collection of various things. * Documents * HOW TOs * Releases * Cur...
Feature List for Add On boards of Timing Receivers at GSI and FAIR This page lists some hardware features for add on boards. Such add on boards are mezzanine boar...
Connection to EE Labor This is just a temporary document, to be replaced by some proper documentation. Note on calculating cable lengths The cable length has bee...
Feature List for Timing Receivers at GSI and FAIR This page lists some hardware features for timing receivers at GSI and FAIR. Some recommended features will beco...
Gateware and Firmware Gateware and firmware are provided with releases. * Gateware: synthesized (V)HDL code * Firmware: compiled code for the lm32 soft CPU ...
The FAIR Timing Master in the "Betriebsgebäude" BG This is a collection of documents related to the FAIR Timing Master in the "Elektronikraum". Equipment Rack5...
Timing Network Networks There are several instances of timing networks on the campus. * Productive * production: everything starting with the end of TK ...
PEXARIA5DB The PEXIARA5DB is a mezzanine card for a PEXARIA5 carrier board. It exists in two variants. * PEXARIA5DB1, with IDC connector for LVDS signals: sche...
Reports and Measurements This page serves to collect reports and measurements on the GMT. Booster Test * Timing events during 1st Booster Mode Test (2021 12 1...
Simple API For Timing (SaftLib) Simple API For Timing (SAFT). The design and implementation of SaftLib is a major project. Introduction The key features SaftLib ...
Etherbone Introduction The idea behind the EtherBone (EB) protocol is to extend the reach of the embedded Wishbone (WB) V4 System on a chip (SoC) bus system to r...
Timing Messages Format of a Timing Message Timing messages is a term describing the input to a Timing Receiver (TR) that possibly leads to generation of a so cal...
MIL Event Telegram Format Introduction The 'old' GSI control system used a field bus that is an extension of the MIL STD 1553 field bus 1 . At GSI, this 'MIL bu...
Event Numbers Overview Event numbers serve as IDs for actions performed by the control system. Existing Facility Information about event numbers used by the ex...
Data Master, UNILAC PZ and Various Gateways An Overview Introduction Today (December 2021) there exist two Machine Timing Systems at GSI. First, the General Ma...
Groups and Machines Figure: Overview on GSI accelerators. Click here for a larger image. Overview Accelerator equipment relevant for the control system is organi...
How To: Flash a Timing Receiver with a Gateware/Firmware Image TL;DR * disable all software on the host (FESA, saftd, ...) * SCU only: disable the watchdog...
How To: Poor Humans TIF An Ugly Temporary TIF Workaround for the 2021, 2022, 2023, 2024 and 2025 Beam Times Introduction As there is currently no replacement f...
Release Asterisk v2 (for miniCS) and updates compatible with SaftLib ( OUTDATED ) Asterisk is compatible to the control system releases R3, R4, R5 and R6 The rele...
Snapshot "January 2016" The intention of this snapshot is twofold. First, to make improvement of White Rabbit available at GSI. Second, to provide again a consist...
Policies in the Timing Network * The timing network is managed by TOS and TOS defines the policies. * The timing network is a "field bus" synchronizing the...
Releases and Snapshots of the Timing System Release A Timing Firmware Release packs together new features and requirements defined in our Development Road Map, ...
UNILAC Chopper Firmware and Monitoring Introduction The main documentation about the (new) UNILAC chopper can be found here. This wiki page only describes som...
White Rabbit Switch Hardware 4.0 Overview This page summarizes the GSI requirements in context with the development of a new version of the White Rabbit Switch. ...
White Rabbbit UNILAC PZ (wr unipz) Introduction UNIPZ Figure: Most simplified view on UNIPZ (upper part). It is a combination of a Super UNIPZ and seven UNI...
WR MIL Gateway Introduction The White Rabbit to MIL gateway can work in one GID only. Its main features are. * listen to so called legacy event numbers, EvtNo...
General Machine Timing System at GSI and FAIR The FAIR facility involves a long chain of accelerators which need to be tightly synchronized. This is achieved by t...