ACU Firmware Change Log
Here you can
find the
change log for the
ACU module firmare.
The
change log for the Nios software can be found
here.
The
change log for the Static Converter and its derivate software can be found
here.
Refer to
ACUFirmwareReleaseNotes for further release information and possibly known issues.
Direct links to the modules
40 x Digital Interlock Module
FG660.14x
7.1.1 (28.02.2020)
- FSP055 added for water-flow monitor visualization
7.1.0 (10.04.2019)
- Added Digital interlock filter.
- Fixed Interlock mask: only 40 interlocks and not 63 were really maskable.
- Updated ACU_CommandDecoder module
7.0.2 (28.09.2018)
- It possible to update the firmware via USB stick
7.0.1 (13.09.2018)
- Fixed ACU_InputFilter.vhd: the main counter has to be set to zero if its value is greater or equal to the delay setting
- ACU_WatreFlowAndICM_TDM.vhd: the period measure can be triggered from the pulse rising or falling edge. A ddedicated geneic selects the trigger mode
7.0.0 (31.03.2017)
- First release of the 7 Series
ADC II 18 bits (Class 3)
FG660.04x
7.1.2 (27.02.2023)
- Update ACU_Heater_Control module
- Updated the following symbols:
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_mUSIC/mUSIC_Shell
7.1.1 (19.12.2019)
- Updated ACU_AlteraRemoteUpdate module
7.1.0 (13.11.2019)
- Included correction factor(from MFU)
ADC 24 bits (Class 2)
FG660.42
7.1.0 (15.10.2024)
- Project migrated to EP3C80 FPGA
- Updated DataStorage module: It is possible to implement this instance both on a Cyclone III and in a Cyclone V.
- Updated ACU_SerialComWrap symbol: gNrByte and gCyclonIII_n_CyclonV generics available on top level.
- Replaced the "main" temperature sensor with HDC1080
- Removed Supply ADC (and as consequence FSP50 and driver as well)
- Updated ACU_AverageTDM symbol with Cyclone III/V symbol
- Gated the SerialCom received payload
- Rearranged the ADC Thrs/Sig signals
- Added INA237 temperature sensor driver
7.0.1 (01.08.2023)
- Removed DCCT connection interlock inversion
7.0.0 (27.02.2023)
ADC DAC IO Module
FG660.18x
7.0.0 (31.03.2017)
- First release of the 7 Series
ADC DAC IO Modul II
FG660.46x
7.2.2 (27.02.2023)
- FSP077 had a reset value 32 bit shorter as it should be
- Somehow the signal Controller_1_SetValueMuxOut[19..0] changed name to Controller_SetValueMuxOut[19..0], but not everywhere in the block diagram.
- An unknown .sdc file was assigned.
7.2.1 (19.12.2019)
- Updated ACU_AlteraRemoteUpdate module
7.2.0 (20.03.2019)
- Added Digital interlock filter.
- - Added PI controller (for Raul's PC)
7.1.1 (02.11.2018)
- It possible to update the firmware via USB stick
7.1.0 (06.07.2018)
- Re-arranged the code compliant with the FUG requirements.
- The module can manage up to 3 USIs connections at the same time without any HW selection:
- 2 USIs on the backplane
- 1 USI on the front plane
- USI_Slave_1 → full equipped
- USI_Slave_2 → HighSpeed data transfer
- 1 USI on the front plane
7.0.0 (12.06.2018)
- Changed class to 26 for the USI slave 2 and 3 "dummy"
- Generated FW version 7_0_0 instead of the "TestVersion"
Analog Interlock Module (AIM)
FG660.56x
7.1.2 (27.02.2023)
- Updated ACU_ADC_732x_Multi_Control symbol
- Updated the following symbols:
- ACU_InputFilter
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_mUSIC/mUSIC_Shell
7.1.1 (19.12.2019)
- Updated ACU_AlteraRemoteUpdate module
7.1.0 (25.03.2019)
- Added Digital interlock filter.
Interlock Control Module III (ICM)
FG660.05x
7.6.2 (27.02.2023)
- Introduced ADC comparator data out sync signal for the data storage module.
7.6.1 (01.12.2022)
- Fixed 'mUSIC_Shell' generic 'gMDUse_HighSpeedPort_AcceptNewDataRisingEdge' from 0000 to 0001. This will fix the DataStorage read back issue found during the SPI_ADC calibration
7.6.0 (11.07.2022)
- Added Ud direct and filtered signals from ICM X3 connector as possible Ud correction actual value. This is done to make the ICM FW back compatible.
- Introduced a Controller enable delay module: the controller enable falling edge will be from 0 to 160 us delayed (MPS has time to react before the power converter is switched off)
- New USI and module symbols:
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_EPCS_Control
- ACU_M25P_Access
- ACU_UpdateHandler
- ACU_RemoteUpdate
- ACU_USI_Merger_Distributor
- ACU_USI
- all modules within mUSIc
7.5.1 (24.05.2022)
7.5.0 (10.02.2022)
- SPI1 and SPI2 can control 2 flow meter PWM inpus on port 1 and 2 when a SPI IO Ext module is attached to them
- Added DataStorage module
- replaced the PWM generator with the generic one. NOTE that the phase shift feature is not anymore there.
- Fixed PWM generator in static firing issue found in the 7.4 release
- Added new control architecture back compatible and with the JEMA France P-Linac features
- On Board ICM ADC can be offset and gain compensated
- SPI ADC Ext can be user offset and gain compensated (before it was possible to act on the gain only)
- Removed the temperature sensor drivers (both on board and external) to save resources
- Re-arranged the signals on the HighSpeed return channel mux
7.4.0 (18.12.2020)
- Added SPI Extension Drivers:
- SPI IO Ext module (configurable as load switch or as generic IO extension)
- SPI ADC Ext module
- SPI IO Opt module
- SPI GridPhase monitoring module
- Modified ACU_MultiSwitchingOperations module to manage multi load switch power converter
7.3.2 (20.03.2020)
- MPS Ready
- Updated ACU_AlteraRemoteUpdate module
- FSP045 ist nun 7 Bytes tief (anstelle 6 Bytes) wegen neuem Adressbreich für zukünftige FPGA Generationen
- FSP055 fuer Wasserwaechter-Anzeige eingebaut
- Das Aktivität des 2ten USI wird nun auch mittels LEDs angezeigt.
7.3.1 (10.04.2019)
- Added three state buffer in combination with an open drain to the USI_SLAVE_LOCAL_TRIPLINE_OK output pin in order to properly manage the HW tripline propagation.
7.3.0 (21.01.2019)
- Added second USI Slave "dummy" used to carry a generic 20 bits value from the MFU to the ICM.
This feature was necessary to avoid to implemet a third PI controller in the MFU FW and use the ones already inside the ICM FW.
7.2.1 (13.09.2018)
- Fixed ACU_InputFilter.vhd: the main counter has to be set to zero if its value is greater or equal to the delay setting
- ACU_WatreFlowAndICM_TDM.vhd: the period measure can be triggered from the pulse rising or falling edge. A dedicated generic selects the trigger mode
7.2.0 (25.07.2018)
- added electrical interlock digital filter
7.0.0 (31.03.2017)
- First release of the 7 Series
ICM primary controlled
Same hardware as
Interlock- and Control Module III (FG660.05x) but completely different functionallity.
7.0.1 (01.12.2022)
- Fixed mUSIC_Shel generic gMDUse_HighSpeedPort_AcceptNewDataRisingEdge from 0000 to 0001. This will fix the DataStorage read back issue found during the SPI_ADC calibration
7.0.0 (29.07.2022)
ICM SR
Same hardware as
Interlock- and Control Module III (FG660.05x) but completely different functionallity.
7.2.1 (27.03.2023)
- Updated the following symbols:
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_mUSIC/mUSIC_Shell
7.2.0 (01.06.2022)
- Added split (14+14) USI High Speed return channel capability
7.1.1 (24.05.2022)
7.1.0 (12.05.2022)
- Added a signal delayer for the incoming high speed USI1 data before feeding the slope limiter
7.0.0 (10.02.2022)
MFU LE (Legacy)
FG660.012...FG660.017
7.0.2 (09.03.2018)
- Fixed MFU_SwitchingOperations module
- Added new ADC_732x_Control strategy
- Set to all zeros the Intr_Enable SCU_Bus_Slave generic
- Changed MFU FSP97 Reset default from "00" to "11"
- Changed MFU Nios Input from intScopePreTriggerOffset[8..1]to FSP116_intScopeTriggerOffset[8..1]
7.0.0 (31.03.2017)
- First release of the 7 Series
MFU LWL (optical fiber)
Same hardware as
MFU SE (FG660.018, FG660.019) but different functionallity.
7.1.0 (20.08.2024)
- Added the received SerialCom payloads (PayloadRx_y_data[23..0], with y=1,2,3,4) as possible input selection of multiplexer instMux10to10_DataFROMHighSpeedPorts (USI HS return channels).
- Updated ACU_SerialComWrap symbol: gNrByte and gCyclonIII_n_CyclonV generics available on top level.
- Gated the SerialCom received payload
- Hard coded the FSP067_Defined_USI[9..6] to always enabled (The disable can be done on the SerialCom tab)
7.0.1 (15.09.2023)
- Fixed Return from [CmdReset] to [CmdNOP] WITHOUT changing the command at the command input
7.0.0 (26.04.2023)
- First release of the 7 Series
MFU SE (Second Edition)
FG660.018, FG660.019
7.6.0 (15.05.2024)
- Added second adder for STF/PTF power converters. It costed 2% resources more. In case we need to save resources again, we can remove it and use this release for STF/PTF only.
- Added ACU_FG_Stimuli module
7.5.4 (15.09.2023)
- Fixed Return from [CmdReset] to [CmdNOP] WITHOUT changing the command at the command input
7.5.3 (30.06.2021)
- Fixed 'USI_Module_MFU_ChecksumBuilder'
- Updated 'MFU_SwitchingOperations', new Cmd 'TriggerSomething'
- Updated Merger/Distrubutor speed optimized
7.5.2 (13.01.2021)
- Fixed SetValues signals in input to the DAQ module.
7.5.1 (16.06.2020)
- Updated ACU_AlteraRemoteUpdate module
- Replaced Input FSPs with ACU_InputFSP_RAM_MFU module.
- Changed Mux16To10 module: The High Speed USIs (Incoming and outgoing) are set to zero in case there is no module defined in PCA.
- Added updated quadratic function generators (they have the sysclk used as clock enable signal because sysclk in MFU boards privious 19 serie is not connected to a pin clock)
- Added DAQ module: the provided DAQ file doesn't contain the sysclk functionality like in the function generators, so it is supplied with 100MHz cock signal.
7.5.0 (12.11.2019)
- DAC driver moved to TFT FPGA
- Correction factor moved to ADC FPGA
- Re arranged the MUX input signal
- Reduce to 4 input the internal scope
- Removed FSP066
- Mux16To10 reduced resources implemented
- Added new NIOS core
7.4.0 (06.02.2019)
- Added Actual value to the High speed data outgoing mux (for Raul PCs)
- Added SlopeLimiterC1 output as possible input to the Adder C1 (for Raul PCs)
- Removed Linear function generators.
- MDS generic "wModuleSubClass" from 0 → 1
- Instance update "inst_ACU32BitMux_11to1" → "inst_ACU33BitMux_11to1"
7.3.2 (31.10.2018)
- Added new slope limiter module: when the controller enable signal is low, the SL output follows the ActuelValue signal.
As soon as controller enable signal rises up, the SL output starts to reach the configured SetVAlue, starting not anymore from zero, but from the last ActualValue sample
- Generated ACU_SlopeLimiter V2.4:
The SetValue starting point is always the Actual value sampled when the slope limiter is turned on(DR 29/10/2018)
7.3.1 (04.05.2018)
- ACU_2_SCUB_RegisterCompatibilityInterface Update auf V1.2
7.3.0 (27.04.2018)
- removed GLAD current comparator
- introduced the PI coefficients selector in the PI controller
- added new outgoing HS data format for GLAD (ActVal1 &ActVal2)
- added new ACU_SlopeLimiter version
- added new modular comparator version (data input length defined via generic)
7.0.2 (09.03.2018)
- Fixed MFU_SwitchingOperations module
- Added new ADC_732x_Control strategy
- Set to all zeros the Intr_Enable SCU_Bus_Slave generic
- Changed MFU FSP97 Reset default from "00" to "11"
- Changed MFU Nios Input from intScopePreTriggerOffset[8..1]to FSP116_intScopeTriggerOffset[8..1]
7.0.0 (31.03.2017)
- First release of the 7 Series
MFU TFT Front Panel
FG660.02x
7.1.2 (27.02.2023)
- Updated the following symbols:
7.1.1 (19.12.2019)
- Updated ACU_AlteraRemoteUpdate module
7.1.0 (13.11.2019)
- Added DAC driver and gain/offset module (from MFU)
7.0.1 (28.09.2018)
- RemoteUpdate Problem für .rbf Dateien via USB Stick behoben. 7.0.0 (31.03.2017)
- First release of the 7 Series
NCTstFac (Normal Conducting Test Facility)
Same hardware as
Interlock- and Control Module III (FG660.05x) but completely different functionallity.
7.1.1 (27.02.2023)
- Updated the following symbols:
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_mUSIC/mUSIC_Shell
7.1.0 (24.11.2021)
- Updated ACU_ADC_732x_Multi_Control symbol
- Added second usi for feed forward
- Added 3 adders for feed forward before the Ud correction modules
- Added User gain and offset compensation
- Added selectable HighSpeedIncominSignal USI slave 1 DIVIDED by 2
7.0.4 (01.09.2021)
- Added ACU_ThyristorFiring module to drive the CrowbarFiringSig signal
- Changed the High Speed return channel structure from 1 signal to two 14b signals
7.0.3 (27.08.2021)
- Fixed PI TDM controller output sequence
7.0.2 (26.08.2021)
- Fixed ACU_ADC_ads8668_Driver, ACU_IO_ExtDriver and ACU_ADC_ads8584s_Driver drivers:
Changed NewDt _Received with NewDt _Received_RE because in case gUseSCLK_BK='1', NewDt _Received can be longer than 1 clock pulse.
In those drivers where NewDt _Received is used for example to increment a counter, this can drive the counter in a wrong way (incrementing two times instead of 1).
7.0.1 (26.07.2021)
- Changed signal on X28-2 connector from ON command to "Soft switch"
7.0.0 (27.07.2021)
Parallel Feeder
Same hardware as
Static Converter III (FG660.09x) but completely different functionallity.
7.2.2 (27.03.2023)
- Updated ACU_ADC_732x_Multi_Control symbol
- Updated the following symbols
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_mUSIC/mUSIC_Shell
- ACU_InputFilter
- USI_Module_MFU_ChecksumBuilder
- ACU_USI
- ACU_USI_Merger_Distributor
- ACU_MultiSwitchingOperations
- NIOS instance
- Updated PWM generator module: with the new PWMgCarrier it is possible to use just one instance (instead of 2).
No phase shift supported anymore(I think it was never used)
7.2.1 (19.12.2019)
- Updated ACU_AlteraRemoteUpdate module
7.2.0 (10.04.2019)
- Added Digital interlock filter.
- Updated ACU_CommandDecoder module
- Added three state buffer in combination with an open drain to the USI_SLAVE_LOCAL_TRIPLINE_OK output pin in order to properly manage the HW tripline propagation.
7.1.3 (28.09.2018)
- It possible to update the firmware via USB stick
7.1.2 (19.09.2018)
- Fixed Board serial number in input to the FSP0
- Added onewire modules to read the boards serial number
7.1.1 (20.06.2018)
- Changed baud rate to 20Mbaud
- Updated MDS modules
7.1.0 (11.06.2018)
- Added new ACU_ModularComparator version
- Added "generic" USI Slave 3 MSD description
ACU Semiconductor Monitoring Module
FG660.073x
7.0.1 (27.02.2023)
- Updated ACU_ADC_732x_Multi_Control symbol
- Updated the following symbols:
- ACU_InputFilter
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_mUSIC/mUSIC_Shell
- ACU_EPCQ: aligned the internal 6 lines SPI driver entity to the component declaration (nSCLKPulses extended from 8 to 12 bits)
7.0.0 (23.10.2018)
- First release of the 7 Series
SR Injection Septa
Same hardware as
Static Converter III (FG660.09x) but completely different functionallity.
7.1.3 (27.03.2023)
- Updated ACU_ADC_732x_Multi_Control symbol
- Updated the following symbols:
- ACU_InputFilter
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_mUSIC/mUSIC_Shell
- ACU_MultiSwitchingOperations
7.1.2 (19.12.2019)
- Updated ACU_AlteraRemoteUpdate module
7.1.1 (27.09.2019)
- Added changes to have full dinamic output firing signals
7.1.0(04.09.2019)
- Added interlocks from x28 extension module.
- ZFC_CmdGen: the thyristor firing signal is driven by the set value coming from the main power converter only when it is on.
- Moved the DCCT correction factor from the MFU to the ADC
- Adapted ADC command decoder in order to be compliant with the MPS bit
- Adapted ICM command decoder in order to be compliant with the MPS bit
- Moved DAC driver from MFU to TFT
- Adapted SR command decoder in order to be compliant with the MPS bit
- Adapted TS1MU1 command decoder in order to be compliant with the MPS bit
- Adapted ZFC command decoder in order to be compliant with the MPS bit 7.0.0 (25.08.2019)
- First release of the 7 Series
Static Converter III
FG660.09x
7.3.3 (27.02.2023)
- Updated ACU_ADC_732x_Multi_Control symbol
- Updated the following symbols:
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_mUSIC/mUSIC_Shell
- ACU_InputFilter
- ACU_USI
- ACU_USI_Merger_Distributor
7.3.2 (19.12.2019)
- Updated ACU_AlteraRemoteUpdate module
7.3.1 (13.11.2019)
- Updated ACU_CommandDecoder module
- Updated ACU_mUSIC_Shell module
- Updated USI Module
- Updated USI_MergerDistribuitor
- MPS ready
7.3.0 (10.04.2019)
- Added Digital interlock filter.
- Updated ACU_CommandDecoder module
- Added three state buffer in combination with an open drain to the USI_SLAVE_LOCAL_TRIPLINE_OK output pin in order to properly manage the HW tripline propagation.
7.2.1 (28.09.2018)
- It possible to update the firmware via USB stick
7.2.0 (11.10.2018)
7.1.2 (19.09.2018)
- Fixed Board serial number in input to the FSP0
7.1.1 (20.06.2018)
- Changed baud rate to 20Mbaud
- Updated MDS and OneWire _Device.vhd modules
7.1.0 (11.06.2018)
- Added new ACU_ModularComparator version
- Added "generic" USI Slave 2 MSD description
- Added the current comparator removed from the MFU FW
TS1MU1
Same hardware as
Static Converter III (FG660.09x) but completely different functionallity.
7.2.3 (27.02.2023)
- Updated ACU_ADC_732x_Multi_Control symbol
- Updated the following symbols:
- ACU_Command_Decoder
- ACU_InterlockMemory
- ACU_mUSIC/mUSIC_Shell
- ACU_InputFilter
- ACU_MultiSwitchingOperations
- Updated PWM generator module with the new PWMgCarrier.
No phase shift supported anymore(I think it was never used)
7.2.2 (19.12.2019)
- Updated ACU_AlteraRemoteUpdate module
7.2.1 (13.11.2019)
7.2.0 (10.04.2019)
- Added Digital interlock filter.
- Updated ACU_CommandDecoder module
- Added three state buffer in combination with an open drain to the USI_SLAVE_LOCAL_TRIPLINE_OK output pin in order to properly manage the HW tripline propagation.
7.1.4 (28.09.2018)
- It possible to update the firmware via USB stick
7.1.3 (19.09.2018)
- Fixed Board serial number in input to the FSP0
7.1.2 (20.06.2018)
- SlopeLimiter Controller 1 war nicht am Differenzbilder angeschlossen
7.1.1 (15.06.2018)
- max. Baudrate von 115k auf 20M geaendert
7.1.0 (11.06.2018)
- Added new ACU_ModularComparator version
- Added new ACU_TS1MU1SetValue version
- Added "generic" USI Slave 3 MSD description
Water Interlock Control Module II (WICMII)
FG660.15x
7.0.2 (18.02.2020)
- Updated ACU_AlteraRemoteUpdate module (Application Image)
- Added ACU_InputFSP_RAM module
- Fixed Temperature (Power,FPGA and Environment) order.
7.0.1 (13.09.2018)
- Fixed ACU_InputFilter.vhd: the main counter has to be set to zero if its value is greater or equal to the delay setting
- ACU_WatreFlowAndICM_TDM.vhd: the period measure can be triggered from the pulse rising or falling edge. A ddedicated geneic selects the trigger mode
Zero Field Control (ZFC)
Same hardware as
ADC DAC IO Ver. II (FG660.46x) but completely different functionallity.
7.2.3 (19.12.2019)
- Updated ACU_AlteraRemoteUpdate module
7.2.2 (13.11.2019)
- Changed the tyristor firing signal generation strategy: the tyristor firing signal follows the setvalue comparator output only when the main power converter is on, otherwise it is set to zero.
7.2.1 (01.07.2019)
- The output enable not delayed is used as PI controller/ PWM generator enable signal.
7.2.0 (10.04.2019)
- Added Digital interlock filter.
7.1.2 (25.06.2018)
7.1.0 (11.06.2018)
- Added new ACU_ModularComparator version
- Added "generic" USI Slave 2 MSD description
7.0.0 (11.01.2018)
- First release of the 7 Series
--
DerekSchupp - 2019-02-06