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HadCon - Documentation

Documentation

Technical Documentation of HadCon and its components

  • Summarizing:
    • CPU: AXIS ETRAX 100LX MCM 4+16
    • Microcontroller: ATMEL AT90CAN128
      • I2C (internal)
        • 2 × 4-channel 8-Bit DAC - Digital-to-Analog Converter
      • CANbus
        • galvanically isolated CAN - High-speed CAN Transceiver
          • optional external power supply
      • SPI
      • ADCs
      • RS232
      • 32 digital I/Os
    • CPLD: Xilinx XCR3064XL-6CS48C
    • 2 × Rotary Code Switches, hexadecimal coding
    • Ericsson PME 5218TS switching regulator for up to 6A 3.3V power usable for other boards
    • full EPICS support

Info

  • GSI-EE's Documentation

Layout

Powering

  • ≈≥ 6V (, < 5 W), 5.5V to 8 V.
    • Ityp ≈ 200 mA
  • internal power regulator
    • Ericsson PME 5218TS switching regulator for up to 6A
      • 3.3V power usable for other boards

CPU

    Kernel

    USART - Universal Synchronous and Asynchronous serial Receiver and Transmitter

      connects to
    /dev/ttyS1 ATMEL
    /dev/ttyS0 RS232-connector

Microcontroller

    USART - Universal Synchronous and Asynchronous serial Receiver and Transmitter

      connects to
    USART0 CPU

CPLD (Complex Programmable Logic Devices)

    connects to:

      pin     pins  
    ETRAX D0   CPLD FB2 DATA
    ETRAX D1   CPLD FB2 DATA
    ETRAX D2   CPLD FB2 DATA
    ETRAX D3   CPLD FB2 DATA
    ETRAX A1   CPLD FB2 ADDR
    ETRAX A2   CPLD FB2 ADDR
    ETRAX A3   CPLD FB2 ADDR
    ETRAX A4   CPLD FB2 ADDR
    ATMEL PC0 (A8)   CPLD FB3 PC
    ATMEL PC1 (A9)   CPLD FB3 PC
    ATMEL PC2 (A10)   CPLD FB3 PC
    ATMEL PC3 (A11)   CPLD FB3 PC
    ATMEL PC4 (A12)   CPLD FB3 PC
    ATMEL PC5 (A13)   CPLD FB3 PC
    ATMEL PC6 (A14)   CPLD FB3 PC
    ATMEL PC7 (A15/CLK0)   CPLD FB3 PC
    JCPLD1 1   CPLD FB4 CP_GP0
    JCPLD1 2   CPLD FB4 CP_GP1
    JCPLD1 3   CPLD FB4 CP_GP2
    JCPLD1 4   CPLD FB4 CP_GP3
    JCPLD1 5   CPLD FB4 CP_GP4
    JCPLD1 6   CPLD FB4 CP_GP5
    JCPLD1 7   CPLD FB4 CP_GP6
    JCPLD1 8   CPLD FB4 CP_GP7
    Device* ↔ *Device Bus/Signal

I2C

    2 × 4-channel 8-Bit DAC - Digital-to-Analog Converter

regulators

VIN 5.5 - 8V → linear regulator: 5V → switching regulator: 3.3V

    linear regulator VIN: 5.5V - 8V → VOUT: 5V

    switching regulator: VOUT: 3.3V

galvanically isolated CAN-bus

    Can - High-speed Can Transceiver

    iCoupler Digital Isolator

Switches

    Rotary Code Switches, hexadecimal coding

    Buttons

    SW1 not mounted
    SW2 not mounted
    SWNB1 not mounted

LEDs

      pin color
    ETRAX PA6 ???
    PA7 ???

Connectors

    JDINOUT1 / JDINOUT2

    • I/O of ATMEL

      JDINOUT1 Connector Pins AT90CAN128 JDINOUT2 Connector Pins AT90CAN128
      1 PA0 (AD0) 1 PC0 (A8)
      2 PA1 (AD1) 2 PC1 (A9)
      3 PA2 (AD2) 3 PC2 (A10)
      4 PA3 (AD3) 4 PC3 (A11)
      5 PA4 (AD4) 5 PC4 (A12)
      6 PA5 (AD5) 6 PC5 (A13)
      7 PA6 (AD6) 7 PC6 (A14)
      8 PA7 (AD7) 8 PC7 (A15/CLK0)
      9/10 GND 9/10 GND

    JADC1

    • ADC inputs of ATMEL

      Connector Pins AT90CAN128 comments
      1 PF0 (ADC0)  
      2 PF1 (ADC1)
      3 PF2 (ADC2)
      4 PF3 (ADC3)

      5 PF4 (ADC4) overlap with JTAG inputs of ATMEL
      6 PF5 (ADC5)
      7 PF6 (ADC6)
      8 PF7 (ADC7)

      9/10 GND

    JTAG1

    • JTAG connector

      Connector Pins Signal comments
      9/11 TCK 10kΩ to V3_3
      3 TDI ← CPLD / Jumper J2 ← ATMEL
      1 TMS  
      7 TDO → ATMEL (→ CPLD)
      4/6/8/10/12 GND  
      5 V3_3  
      2/13/14   not connected

    JCAN1

    • JCAN1 CAN connector

      JCAN1 Connector Pins Signal comments
      1 CANH ↔ CAN - High-speed Can Transceiver ATA6660 ↔ iCoupler Digital Isolator ↔ ATMEL
      2 CANL
      3/5 VCAN_INPUT
      4/6 GND_CAN

    JDAC1

    • Output of the 2 4-channel DAC (DAC5574)

      Connector Pins Signal Device Device pin
      1 DACOUT0 UDAC1 VoutA
      2 DACOUT1 VoutB
      3 DACOUT2 VoutC
      4 DACOUT3 VoutD
      5 DACOUT4 UDAC2 VoutA
      6 DACOUT5 VoutB
      7 DACOUT6 VoutC
      8 DACOUT7 VoutD
      9/10 GND    

    JPS1

    • mixed Signals DAC (DAC5574)

      Connector Pins Signal Device comments
      1/2 V5_0_CON  
      3/4 GND  
      5 DACOUT0 UDAC1 VoutA
      6 DACOUT1 VoutB
      7 DACOUT2 VoutC
      8 DACOUT3 VoutD
      9/10 POWER_ON AT90CAN128 PA7 (AD7)
      11 ADC0 PF0 (ADC0)
      12 ADC1 PF1 (ADC1)
      13 ADC2 PF2 (ADC2)
      14 ADC3 PF3 (ADC3)
      15 ADC4 PF4 (ADC4)
      16 ADC5 PF5 (ADC5)
      17 ADC6 PF6 (ADC6)
      18 ADC7 PF7 (ADC7)
      19/20 GND  

    JSUBD1

    • RS232 connector Sub-D 9
      Connector Pins ETRAX comments
      2 RXD0 ETRAX's /dev/tty0 via RS232 driver
      3 TXD0
      7 RTS0
      8 CTS0
      5 ==
      1/4/6/9 not connected

Bugs, Notes, Remarks, Tweaks & Twiddling

    Notes and Remarks

      1-wire

      1. When driving 1-wire devices, typically via JDINOUT2, make sure to have (at least) 1 pull-up resistor of about 3.3kΩ on the data line of the 1-wire bus connected to the power VDD.
        • Recommended to have it at the master, e.g. at HadCon's connector JDINOUT2.
        • Possible option for future, directly at the connector, when using one of JDINOUT2's pins as permanent power pin.

    Tweaks: increase ATMEL_CLOCK to 10MHz

    Bridge Flip-flop to increase ATMEL_CLOCK to 10MHz
    to be able to transmit up to baud rates of 115200 you have to manipulate the hardware of the hadcon.
    The clock signal of the oscillator X1 is 20 MHz. It is scaled down by two flip-flops (UFF1, UFF2) first to 10 MHz and then to 5 MHz.
    Now 10 MHz are needed
    Therefore UFF2 has to be bridged or short-cut, i.e.
    1. pin 5 of UFF2 has to be disconnected from its pad and removed
    2. A cable has to be soldered connecting pin 1 of UFF2 to the solder pad of pin 5

    Bug: Switches

    SW2
    SW2 is not correct wired, don't use it


-- PeterZumbruch - 15 Feb 2012

Topic attachments
I Attachment Action Size Date Who Comment
10643.pdfpdf 10643.pdf manage 122.2 K 2011-06-15 - 12:13 PeterZumbruch Rotary Code Switches, hexadecimal coding
EmbeddedLinuxDev___DaqSlowControl___Hades_Wiki.zipzip EmbeddedLinuxDev___DaqSlowControl___Hades_Wiki.zip manage 264.5 K 2018-03-15 - 10:07 PeterZumbruch EmbeddedLinuxDev _ DaqSlowControl _ Hades Wiki.zip
EtraxMcmControl___DaqSlowControl___Hades_Wiki.zipzip EtraxMcmControl___DaqSlowControl___Hades_Wiki.zip manage 155.3 K 2018-03-15 - 10:29 PeterZumbruch EtraxMcmControl _ DaqSlowControl _ Hades Wiki
bc_etrax_combo_28899_en_0703_lo.pdfpdf bc_etrax_combo_28899_en_0703_lo.pdf manage 547.3 K 2011-06-15 - 09:51 PeterZumbruch System-on-Chips and Device Servers
doc7679.pdfpdf doc7679.pdf manage 5152.0 K 2010-03-11 - 14:51 PeterZumbruch AT90CAN32/64/128 (428 pages, revision H, updated 8/08), local copy of http://www.atmel.com/dyn/resources/prod_documents/doc7679.pdf
ds017.pdfpdf ds017.pdf manage 158.0 K 2011-06-15 - 09:56 PeterZumbruch XCR3064XL 64 Macrocell CPLD
ds_etrax_mcm_4p16_21724_en_0505_lo.pdfpdf ds_etrax_mcm_4p16_21724_en_0505_lo.pdf manage 436.5 K 2011-06-15 - 09:50 PeterZumbruch ds_etrax_mcm_4p16_21724_en_0505_lo.pdf
etrax_100lx_des_ref-060209.pdfpdf etrax_100lx_des_ref-060209.pdf manage 5974.7 K 2011-06-15 - 09:52 PeterZumbruch AXIS ETRAX 100LX Designer’s Reference
etrax_100lx_prog_man-050519.pdfpdf etrax_100lx_prog_man-050519.pdf manage 1808.4 K 2011-06-15 - 09:53 PeterZumbruch AXIS ETRAX 100LX Programmer’s Manual
hadshopomo.pdfpdf hadshopomo.pdf manage 114.3 K 2011-06-15 - 09:49 PeterZumbruch local copy of schematics of hadcon
ucc383-adj.pdfpdf ucc383-adj.pdf manage 935.7 K 2011-06-15 - 11:23 PeterZumbruch UCC383-adj linear regulator
Topic revision: r10 - 2018-03-26, PeterZumbruch
 
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