Finished Projects (development phase finished)
GSI, Dept. Experiment Electronics (EE)

Since: March 2007



ProjectSorted ascending Description Contact tmp. goal Comments
4 channel QFW module ready to use modul with the GSI QFW ASIC H.Flemming GSI  
Aging-Test stand Measurements of aging effects in ionisation detectors using NI hardware H.Brand GSI  
CLOSY Cbm-cLOck-SYnthesizer K.Koch CBM TOF  
CS Database   H.Brand, D.Beck FOPI, HITRAP, MATS, PHELIX, SHIPTRAP development temporarily frozen
DoubleHit1 Upgrade of the TACQUILA system to measure consecutive input pulses in one channel K.Koch EE / CBM TOF  
ENN1   J.Hoffmann GSI, extern NIM - ECL - NIM  
ENV1   J.Hoffmann GSI, extern  
EPICS embedded - ETRAX Porting EPICS to cris architecture to run on ETRAX single chip CPU used e.g. on HADControl and TRB boards P.Zumbruch GSI/HADES/FAIR  
EPICS embedded - Xilinx FPGA EPICS based Input Output Controller (IOC) in Xilinx Virtex FPGA P.Zumbruch GSI, CBM, FAIR  
EPICS for HADES several EPICS developments HADES P.Zumbruch GSI, HADES see also EPICS embedded - ETRAX entry
EPICS HADControl EPICS based temperature readout of HADControl, version 2 P.Zumbruch GSI/HADES/FAIR  
EPICS MBS monitor EPICS record support for MBS status data H.Essel, J.Adamczewski MBS/FOPI Production
EPICS MBS monitor archiver Based on EPICS - Support for Channel archiver - Setup and Introduction for FOPI P.Zumbruch GSI, FOPI  
ESR-Analysis Analysis package for Schottky noise measurements H.Essel AP, Decay - Experiments Annual report. Production
FEBEX1 8 channel ADC interface board with 2 optical outputs J.Hoffmann GSI  
FLA1610 Fast amplifiers in NIM - Modules K.Koch HypHI  
FopiClkdstr1   K.Koch FoPi, CBM TOF  
FRS Controls CS -Installation, CS-Class for gas flow regulator by Bronkhaus and UfsACC-Interface H.Brand, A.Schwinn, C.Wandji FRS  
HADCON (earlier HADSHOPOMO CAN-BUS ) CAN bus with HadesControl-Module M.Traxler GSI/HADES  
HADSHOPOMO CAN-BUS CAN bus with HadesControl-Module M.Traxler GSI/Hades  
Hit-Fr   J.Hoffmann HIT, GSI  
Intensity control KO-Exciter Tin-spill variation of beam intensity H.Hahn Cave-M  
IonBeamVIEW readout of IEEE1394- and GigE-cameras for adjustment of the beam H.Brand BIO  
LANDFEE1/2 Design and production of the "Startboard" for the TACQUILA System K.Koch  
MDC Driver Cards with optical interface   M.Traxler GSI/HADES  
Migration CS V3.0 Migration of CS -Framework based Control Systems D.Beck, H.Brand GSI, FOPI, SHIPTRAP  
Motor control   D.Beck ALICE, TPC  
PSD1610 Passive split and delay in NIM K.Koch HypHI  
QFW (for beam diagnostics)   S.Löchner, M.Witthaus GSI Strahldiagnose  
QFW ASIC   H.Flemming GSI  
Samples sluice control X0 sequence control system with 4 stepper motors U.Thiemer, H.Brand X0  
SIDEREM2   J.Hoffmann, W.Ott, N.Kurz GSI, FRS, SFRS  
SISCLKDSTR Precise clock generation (125MHz) and distribution (1:12) for SIS100, PECL-based K.Koch Beam Diagnostic  
TACQUILA's I2C master core I2C master core with interface to GTB bus; s. Präsentation: I2C Master Core with Interface to GTB Bus; works with TACQUILA I.Rusanov R3B  
TACQUILA2/3 high-resolution time measurement system K.Koch R3B  
TACQUILA3 A compact electronics for time measurements with very high resolution ~ 10ps RMS. K.Koch FoPi, CBM TOF  
Target Wheel Control   H.Brand, H.Hahn, T.Torres de Heidenreich TASCA/KC  
Tasca Go4 analysis for TASCA H.Essel Tasca  
TASCA Target Wheel Control 2
(4 Target Wheel Step Motor)
  T.Torres de Heidenreich TASCA / KC  
TRB V2 Readout Board for TDCs and connectivity for many other detectors M.Traxler GSI, HADES / Panda, CBM, PET  
TRB V2 MDC-Readout MDC readout M.Traxler HADES  
TRIPLEX control- and measuring plug-in board for TACQUILA system K.Koch LAND  
TRIXOR1 Trigger module in PC J.Hoffmann, W.Ott, N.Kurz All  
Vulom3 - "Self Tester" FPGA design, realized the full test and the resources checking of the electronic module "Vulom 3" I.Rusanow, J.Hoffmann EE - Internal project  
VULOM5AD1 optical interface for VULOM5 J.Hoffmann Alle  
VUOLM4 Replacement for VULOM3 JH, NK All  
VUPROM2   J.Hoffmann HypHI  
Vuprom2 - "Self Tester" FPGA design, realized the full test and the resources checking of the electronic module "Vuprom 2" I.Rusanov, J.Hoffmann EE - Internal project  
Z6-Control s. Presentation U.Thiemer Plasma Physics  




Contact: s. EE-Persons

s. also EE current projects, EE-Service (E / D), and EE Home Page



-- EugenBadura - 20 Mar 2007

This topic: EE > ProjectEEfin
Topic revision: 2016-09-30, StefanHaller
 
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