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Using an NI FPGA card as Multi-Channel-Scaler (MCS)

A mutli channel scaler (MCS) can be used for time resolved counting of ion or photon signals. One application is the acquisition of time-of-flight (TOF) spectra of bunched ions produced in an ion source or ejected from an ion trap. The main idea is using a reconfigurable IO (RIO), a field programmable gate array (FPGA), as MCS.

Specifications

  • An NI-FPGA (like PCI 7811R) is required.
  • FPGA is clocked with 80MHz enabling counting with up to 40MHz.
  • The digial IO (TTL) of the FPGA is used. As a consequence
    • analog signals as from micro channel plates or channeltrons have to be conditioned by, as an example, using appropriate NIM electronics, and
    • required are pulses with minimum 12.5 ns HIGH and 12.5ns separation between two subsequent pulses.
  • The width of a bin in the TOF spectrum is a multiple of 25ns.
  • Multiple triggering is supported. However, for safe operation the product of the number of re-triggers and number of bins in the TOF spectrum should not exceed 16383.

Connections and Signals

Three digitial lines are used on Connector 1 (not Connector 0):
  1. DIO0: start trigger
  2. DIO1: signal input
  3. DIO2: is active
All digital lines use TTL level and trigger on the rising edge. Analog detector signals must be discriminator using a standalone discriminator like a NIM module. The "is active" output can be used to check, if the MCS has received a trigger and/or is just acquiring data.

Structure of Software

The interface to the FPGA is encapsulated in an instrument driver which allows to switch betweeen different FPGA targets in the LabVIEW development system. For CS, a dedicated class uses the FPGA instrument driver.

Switching Between Different FPGA Targets

In case you would like to switch to another target, please do the following.
  1. Instrument Driver "NI-FPGA-MCS_Driver"
    1. Select the approprate bit file in the "initialize" VI of this driver. In case the bitfile for the required target does not exist, it has to be compiled for the new target using the LabVIEW FPGA module.
    2. On the block diagram create a "control" of the FPGA-VI reference.
    3. Open the typedef "fpga_vi_ref.ctl" and replace the control by copying and pasting the one you have just created in the "initialize" VI.
    4. Save the "fpga_vi_ref.ctl" and, most importantly, perform an "apply all changes".
    5. You shoult now delete the "control" you have created in the "initialize" VI.
    6. Save the "initialize" and all other VIs.
  2. CS class "NIFPGA-MCS"
    1. Just open the "contents.vi" of that class.
    2. Close the VI acknowlodging to save all changed sub-VIs.

-- DietrichBeck - 22 Aug 2008
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Topic revision: r1 - 2008-08-22, DietrichBeck
 
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