Radiation damages to electronic components are an important issue for future FAIR experiments. One of the preferred technology for ASIC developments at GSI is the 180nm UMC CMOS process. In this regard the ASIC design group of the GSI Experiment Electronic department has been launched a research project in 2007, including the development of an ASIC called GRISU. The main goal is the characterisation of Single Event Effects (SEE) as well as Total Ionising Dose (TID) effects on the 180nm UMC process.